CHIP DESIGNER Innovative Silicon (IS) has overcome two hurdles that will allow its Z-RAM zero-capacitor, floating body (FB) memory technology to compete with traditional DRAM.
According to IS, it has managed to reduce the bit cell operating voltage to less than one volt, bringing it on par with cutting edge DRAM voltages, and with no degradation to its multi-second static retention time. Secondly, by using the same 3D transistor structures used in most DRAM manufacturing, IS has developed a way of bulk producing the Z-RAM silicon without need for expensive silicon on insulator substrates.
"Conventional DRAM has been the low cost, random-access memory technology for 40 years, but the memory industry is on the verge of transitioning to the capacitor-free Z-RAM technology," boasted Mark-Eric Jones, president and CEO of Innovative Silicon.
The company tapped memory maker Hynix to create a test chip, which confirms that the Z-RAM design can be produced at a lower cost than equivalent sub-40nm DRAM nodes, while still matching power requirements and Double Data Rate performance levels.
This new technology could be just the shot in the arm that the memory market needs, according to Jim Handy of Objective Analysis.
"The DRAM market, the largest of the memory markets, is facing phenomenal challenges in migrating to future process nodes. Floating body technology is poised to solve some of those challenges, and now with Z-RAM on bulk substrates and running at DRAM-level voltages, Innovative Silicon is in a good position to help the industry continue to deliver cost reductions consistent with Moore's Law."
There is no news yet about when we might see Z-RAM out in the real world, but IS and Hynix have jointly authored a paper about the Z-RAM technology, which has been submitted to the 2010 VLSI Technology Symposium. µ
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