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Nvidia working on 3D memory for Pascal next-gen GPUs

Will arrive in 2016 to solve bandwidth bottlenecks
Tue Mar 25 2014, 19:01

NVIDIA HAS REVEALED that it is working on 3D memory for its next-generation Pascal graphics processing units (GPUs), which are set to arrive in "just a couple of years", to solve bandwidth bottleneck problems.

Speaking at the GPU Technology Conference (GTC) on Tuesday, Nvidia co-founder and CEO Jen Hsun Huang announced that the firm is "rigorously testing" the technology to bring memory bandwidth to "a whole new level".

Nvidia CEO Jen Hsun Huang GTC Pascal 3D memory

Dubbed Pascal, Nvidia's next-generation GPU technology is named after Blaise Pascal (1623-1662), a French mathematician and physicist, and the genius behind Pascal's Theorem, Pascal's Law and probability theory.

Huang explained that the firm's Pascal series GPUs will provide more memory bandwidth. He said, "We would love to have many times more [bandwidth] but the challenge, of course, is that the CPU already has a lot of pins [and is] already the biggest chip in the world, [as] the interface is already extremely wide."

Huang explained that to solve this problem, Nvidia has decided that 3D packaging is needed for its next generation GPUs.

"We are going to, for the first time, build chips on top of other chips, and we are going to pile heterogeneous chips - meaning different types of chips - on one wafer," Huang said, adding that "interchip routing is done on the wafer".

Nvidia CEO Jen Hsun Huang GTC Pascal 3D memory keynote

"Thousands of little bumps, characterised by a vertical signal on these chips are flipped and bumped onto the base wafer," Huang explained. "We are putting in so many bits that the memory interface went from hundreds of bits to thousands of bits, making a GPU with thousands upon thousands of memory interface bits."

This is achieved by stacking memory chips one on top of another.

"We [then] punch holes through the memory using through-silicon vias and each chip and each DRAM is then installed on top of each other - the stacked DRAM is stacked on top of a wafer," he added. "That wafer - because it's a silicon substrate - can now house wires incredibly small, which connects us to the GPU, and together it forms an interface that delivers an unbelievable amount of bandwidth."

This technology will be based on Nvidia's high-speed interconnect technology, NVLink, which the firm also announced today and promises to increase speeds by five to 12 times over PCIe by increasing the bandwidth between the CPU and GPU. In doing so, it minimises the time that the GPU has to wait for data to be processed, the firm claimed.

Huang claimed that this will eliminate a longstanding bottleneck and help pave the way for a new generation of exascale supercomputers that are 50 to 100 times faster than today's most powerful systems.

Nvidia expects to release its Pascal series GPUs by 2016. µ

 

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