CHIPMAKER Intel has revealed that it will develop a chip that incorporates its Xeon Phi co-processor, dubbed Knights Landing.
Intel has so far put its Xeon Phi accelerators onto daughter boards that run on the PCI-Express bus, however the firm told The INQUIRER last year that eventually the Many Integrated Core architecture behind the Xeon Phi will become a co-processor.
Now Intel has announced that it is working on a standalone chip that includes Xeon Phi cores, codenamed Knights Landing, which will be fabbed on its upcoming 14nm process node.
Intel didn't release any specifications for Knights Landing other than saying it will have on-package memory, a trend it started with its Iris Pro branded graphics in Haswell processors. Rajeeb Hazra, VP of Intel's Datacentre and Connected Systems Group said the goal is to eliminate the bottleneck posed by the PCI-Express bus.
Hazra however wouldn't provide any details on how the firm intends to overcome the bandwidth shortfall that comes along with using system memory rather than high bandwidth GDDR5. He said that Intel will consider memory hierarchies and is keeping an eye on upcoming memory technologies.
Intel didn't say when it will release Knights Landing, but given that the firm believes the high performance computing market will be worth up to $15bn in four years, it is safe to say that Intel won't waste much time.
The firm's Knights Landing chip will also perhaps spell the beginning of the end for accelerators, as CPUs with on-package or better still on-die accelerators offer significant density and power benefits. µ
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