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ARM releases dual-core Cortex A15 hard macro for TSMC's 28nm HPM process node

Should speed up chip development
Tue May 28 2013, 17:29
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CHIP DESIGNER ARM has announced a dual-core hard macro for its Cortex A15 chip that uses TSMC's 28nm high performance mobile (HPM) process node.

ARM's Cortex A15 chip is perhaps best known as the processor in Google's Nexus 10 tablet and is based on the ARMv7 instruction set. To speed up deployment, ARM has announced a hard macro for a low-power version of the Cortex A15 chip designed to be used by TSMC's 28nm HPM process node.

ARM releases hard macros for most of its processor designs in order to help smaller licensees speed up the end-to-end process of development to final products. In this case, the firm offers an implementation that integrates its Neon single instruction, multiple data (SIMD) engines and 1MB of Level 2 cache and is tested on TSMC's 28nm HPM process.

ARM said the dual-core hard macro was implemented using its Artisan 9-track libraries and POP technology. The firm played up the ability for the Cortex A15 to serve as a "big" processor in its Big Little architecture while lower power Cortex A7 chips can act as smaller cores to handle menial tasks.

Google's Nexus 10 used a Cortex A15 based chip designed by Samsung. ARM's hard macros are not intended for firms such as Samsung, Qualcomm, Texas Instruments or Nvidia that have resources to spend on tweaking reference designs to add their own technology, but rather for smaller designers with more modest resources. ARM's hard macros are reference designs that give smaller licensees some help to compete against the big chip designers.

ARM's Cortex A15 is primarily intended for tablets and the Nexus 10 showcases what the chip can do. Even with ARM's low-power hard macro, it is difficult to foresee the Cortex A15 ending up in a smartphone, but it should speed up the availability of chips, and thus consumer devices, that use ARM's presently highest performance application processor. µ

 

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