SAN FRANCISCO: CHIP DESIGNER AMD has reiterated the need for a heterogeneous architecture that makes use of both CPU and GPU resources, claiming that it will support increases in programmer productivity and lead to improvements in device efficiency.
On the first day of the International Solid State Circuits Conference (ISSCC) in San Francisco, AMD SVP and GM Lisa Siu told attendees that we are seeing an ever increasing number of different architectures in computing systems. She said that historically this has not been a problem, but it is getting increasingly difficult to support the rapidly increasing number of different architectures.
"There are many examples of platforms with heterogeneous components, including network and I/O processing, signal processing, graphics processing, and so on," Siu said.
Siu reiterated AMD's vision to have a unified programming model and a unified memory address space, allowing programmers to make use of CPU and GPU resources with minimal code changes.
The purpose of the unified programming model is to make programmers more productive, and the rationale for having a unified address space is to avoid having to move data around all the time.
Siu pointed out that shifting data to and from different processors is an expensive business both in terms of programming and computing resources.
"Historically, these computing elements have been treated as separate programming environments, each with its own programming language and tools, private memory, and separate address space," Siu said.
"Accessing these different elements required explicitly copying data between address spaces and sending commands through driver interfaces to software written by a different team of programmers."
Siu continued by claiming that programmers want greater control over which processors their programs are executed on for power efficiency reasons.
"This approach works well only when there is a clear delineation of work to be done. Today, however, the lines of delineation are blurring," she argued.
"In the drive to improve efficiency on power-constrained platforms, programmers are seeking more direct access to, and control of, the different programmable elements on a system in order to execute tasks with greater power efficiency."
Not surprisingly, Siu promoted the Heterogeneous System Architecture (HSA), which is supported by an industry alliance comprised of AMD, ARM, Imagination Technologies, Mediatek, Texas Instruments, Samsung Electronics, and Qualcomm. Notably absent from the alliance is AMD's main competitor, Intel.
The general idea behind HAS is to have programmers write in a host language that is then automatically translated to native code for each computing device. This will also enable existing code to run on new architectures as long as translators are provided. µ
You know, if you want to
Yes means yes. No means yes. Here means no. But only for eight hours. Possibly
But it won't arrive until the fourth quarter, apparently