She is a winsome wee thing, She is a handsome wee thing, She is a bonny wee thing, This sweet wee wife o' mine - Robert Burns
PATENT LITIGATION SPECIALIST Rambus has announced its LPDDR3 architecture as the launch product for its R+ memory interface.
Rambus, which is best known for its litigious behaviour against other semiconductor vendors, has announced its R+ memory interface. The firm has announced LDDR3 modules for portable consumer electronics devices as the launch product for its memory interface.
Rambus' R+ LPDDR3 architecture includes both the memory controller and the DRAM interface, with the firm claiming it can reduce power consumption by 25 percent. The firm cited bandwidths between 1,600 Mbit/s and 3,200 Mbit/s and Rambus cited compliance with LPDDR3 and DFI 3.1 standards.
Rambus said its R+ LPDDR3 architecture is backwards compatible with the firm's older LPDDR3 architecture and supports the same protocols, power states and package definitions. The firm said the R+ architecture brings the power consumption down by using single-ended ground terminated signalling.
Rambus SVP and GM of its Memory and Interface division Kevin Donnelly said, "Each generation of mobile devices demands even higher performance with lower power. The R+ LPDDR3 technology enables the mobile market to use our controller and DRAM solutions to provide unprecedented levels of performance, with a significant power savings."
Rambus said its R+ LPDDR3 controllers and interface products are available immediately. µ
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