CHIP DESIGN VENDOR Mentor Graphics has announced hardware emulation for the verification of system-on-chip (SoC) processors based on the ARM Cortex A9 architecture.
Mentor Graphics, which supplies hardware and software to a number of chip vendors to verify designs prior to production, has announced a new piece of hardware that can be attached to its Veloce emulator to verify the latest ARM chip architecture. The firm said that its Isolve product provides verification and debugging capabilities for chips based on the ARM Cortex A9 architecture.
Mentor Graphics said its Isolve unit can be used with in-circuit emulators or as transaction-based acceleration, though it promotes the ability to use its own Veloce 2 emulator.
Eric Selosse, VP and GM of Mentor Graphics' Emulation Division said, "We recognize that for designers developing leading-edge products that embed high-performance ARM processors, they need access to the most up-to-date verification solutions to help perform the rigorous pre-silicon testing required for their SoCs. Our long-standing relationship with ARM enabled us to rapidly create the Isolve solution for ARM Cortex-A9 dual core, delivering a high-speed and accurate hardware-assisted solution that addresses the needs of our customers who face huge challenges to deliver their products on time in highly competitive markets."
Chip vendors such as AMD, Intel, Qualcomm and Samsung need to validate their designs against the reference architecture, their own internal designs and any specific tweaks required by the fab's process node. Mentor Graphics' support of the ARM Cortex A9 architecture is a vital step toward processors based on the architecture appearing in devices. µ