MEMORY MAKERS Micron and Samsung have announced that the Hybrid Memory Cube consortium they lead has published a first draft of its interface specification.
The Hybrid Memory Cube Consortium (HMCC) has been developing a memory interface that scales to very high bandwidths for use in network equipment and servers.
According to HMCC, the first draft of its interface specification defines the protocol and short-reach interconnects across PHYs for high-end networking kit, industrial and test and measurement applications. HMCC's next step will be to iterate the specification and define an ultra short-reach PHY for FPGAs, ASICs and ASSPs.
Rob Sturgill, an architect at Altera said, "With the draft standard now available for final input and modification by adopter members, we're excited to move one step closer to enabling the Hybrid Memory Cube and the latest generation of 28nm FPGAs to be easily integrated into high-performance systems.
"The steady progress among the consortium's member companies for defining a new standard bodes well for businesses who would like to achieve unprecedented system performance and bandwidth by incorporating the Hybrid Memory Cube into their product strategies."
The HMCC has a number of big names behind it including ARM, HP, IBM and Microsoft, alongside leaders Micron and Samsung. The consortium claims it already has seen interest from 115 prospective adopters, which is impressive given that it has only just come out with a draft specification.
The HMCC is working to have a final interface specification published by the end of the year. µ
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