The art of taxation consists in so plucking the goose as to get the most feathers with the least hissing - Jeane Baptiste Colbert
CHIPMAKER Intel has released its Xeon E5 processors that it is pitching at cloud deployments.
Intel's Xeon E5 processors have been out of the fab for a while, with Graham Palmer, MD of Intel UK telling journalists that its Xeon E5 chips have been in the channel since the third quarter of 2011, shipping hundreds of thousands of units. Today, however, was the day that Intel finally allowed its system builders and board partners to release servers and workstations based on its latest Sandy Bridge ES Xeon E5 chips.
Intel's Xeon E5 chips will be available in the single processor Xeon E5 1600 series and dual processor Xeon E5 2600 series units. Intel senior fellow Steve Pawlowski said the firm concentrated on bringing more input/output functionality on the die to increase bandwidth and reduce latency, since increasing computing power is pointless if you can't feed the chip with enough data to crunch.
Perhaps the biggest visible change with the Sandy Bridge ES Xeon E5 chips, aside from using Socket 2011, is the re-emergence of Turbo mode. Pawlowski said that while previous incarnations of Turbo mode checked load levels to adjust frequency every millisecond, the latest version of the technology judges processor use over longer periods, in the region of 10 seconds.
Pawlowski explained the Xeon E5 chip "saves up credits" when it runs below its maximum TDP, which can be cashed in at a later time. This is an attempt to meet fluctuating workload patterns rather than flash-crowds, which generally are mitigated in cloud environments by the sheer volume of servers.
Intel had a number of big name system vendors turn up with blade servers based on the Xeon E5 chip, including IBM, HP and Dell. From our tests there's little doubt the Xeon E5 processors are fast chips, beating the Sandy Bridge E-based Core i7-3960X, which is essentially the same architecture minus two cores and having a slightly less impressive memory controller.
Why did Chipzilla put its Xeon E5 chips into the channel almost two quarters before publicly launching the processors? It could well be that AMD's Bulldozer Opterons simply did not scare Intel into action, so it waited to bring out Sandy Bridge ES Xeon E5 processors until just a month or so before it will release its Ivy Bridge architecture. µ
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