CHIP DESIGNER AMD will use a resonant clock mesh in its upcoming Piledriver core processors.
AMD's Piledriver core will become the successor to its Bulldozer core that appeared in the last quarter of 2011. Although public details about Piledriver are scant, Cyclos has announced that AMD licensed its resonant clock mesh technology in order to reduce the chip's clock distribution power.
Cyclos didn't give out many details on what a Piledriver core - or module as AMD prefers to call it - is going to be, other than saying it is "4+ GHz" and that it is fabbed on a 32nm process node. As for the integration time, AMD's Samuel Naffziger said, "We were able to seamlessly integrate the Cyclos IP into our existing clock mesh design process so there was no risk to our development schedule."
Cyclos claims its resonant clock mesh implementation can bring significant power savings. The firm, which has investment from ARM and Siemens, had designs that were until now largely verified on paper, with AMD becoming its first major licensee, and other chip designers might now follow.
Marios Papaefthymiou, founder and president of Cyclos was bullish about his firm's research, which is now set to be transferred into production silicon. "Now that the Cyclos technology is validated, we're looking forward to expand into SoC designs via the design automation tools that are in development at Cyclos. We believe resonant clock mesh design will be a key enabler for GHz+ embedded processor IP blocks in next generation SoCs that also require ultra-low power consumption," said Papaefthymiou.
AMD is expected to launch chips with Piledriver cores later this year as the firm tries to build on its Llano desktop and Bulldozer server processors. AMD has previously told analysts and hacks that it expects somewhere in the region of a 10 to 15 per cent performance gain over the previous year's silicon. µ
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