Teeth make smiles, and smiles make sales - Unidentified Harrods person in Alan Sugar's The Apprentice
CHIPMAKER Intel has announced a trio of updated features for its upcoming Itanium chips codenamed 'Poulson'.
Chipzilla made the announcements at last week's Hot Chips conference in California. It made three additions, which are Instruction Replay, improved Hyper-Threading and new instructions.
The Instruction Replay technology is an important remote access services update and the first Intel chip to have the capability.
Pauline Nist, general manager at Intel's Data Center Group said this "utilizes a new pipeline architecture to expand error detection in order to capture transient errors in execution. Upon error detection, instructions can then be re-executed from the instruction buffer queue to automatically recover from severe errors to improve resiliency."
This technology enables the second feature which is improved Hyper-Threading which brings better performance and support for Dual Domain Multithreading. This allows for front and backend pipeline execution, therefore improving Poulson's parallelism.
Intel is also adding instructions in four areas. There are new integer operations, expanded data access hints, expanded software prefetch and thread control.
It is worthwhile for Xeon customers to keep an eye on Itanium updates and features because they are likely to appear in future Xeon CPUs.
The Poulson chip is on course to tip up next year and has eight cores and 12-wide issue architecture. The next Itanium chip codenamed 'Kittson' will follow and is expected in 2014. µ