NEC-HITACHI'S MEMORY BUSINESS, Elpida Memory has begun churning out 25nm memory chips just lately, as of the beginning of August, in fact. The 25nm fab process offers substantial power and manufacturing cost savings.
The announcement of the 25nm CMOS development in May had Samsung throwing a fit, and one Samsung VP claimed that Elpida's achievement was patently false. The flip of the finger response came from the Japanese manufacturer earlier this week, when the company announced shipments of 2Gb DDR3 SDRAM modules.
The process will deliver 15 per cent power savings during operation and 20 per cent while on standby, compared to the company's current 30nm process. The operating voltage is the standard 1.5V, but a lower power version will be made available operating at just 1.35V. The fab process should also bring with it lower manufacturing costs, which should be reflected in lowering the cost-per-gigabyte of DDR3 SDRAM. The priority, right now, is to cater for PC desktop and server solutions.
Elpida, which is traditionally strong in the onboard memory of handheld devices, also plans to bring this manufacturing process to its mobile RAM segment where it will be able to cater for the onrushing deluge of demanding mobile operating systems in smartphones, tablets and hybrid devices.
While Elpida is now shipping 2Gb modules, its 4Gb modules will be available by the end of the year. This also means that traditional DDR3 SDRAM DIMMs, which usually take eight chips per side and currently hold capacities of 4GB on a single side DIMM, and 8GB per double-side DIMM, will double in capacity. µ
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