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Intel announces 3D transistors for 22nm Ivy Bridge chips
CHIPMAKER Intel has taken the lid off three-dimensional tri-gate transistors that it will use in its 22nm fab process for Ivy Bridge processors.
Intel billed its announcement yesterday as its "most significant technology announcement of the year" and while that might be true, consumers will have to wait at least until the start of 2012 to see the firm's 3D tri-gate transistors in action. Tri-gate transistors will keep Moore's law alive "for at least two years", according to Bill Holt, SVP and general manager of Intel's technology and manufacturing group.
Currently Intel's processors, including its latest 32nm Sandy Bridge chips, use two dimensional or planar transistors that provide only one gate per structure to control switching logic. But Intel's 3D tri-gate transistors vertically rise above the silicon substrate and implement three gates per structure on three surfaces of the 'fin', both sides and the top.
So what exactly does this mean for Intel? Mark Bohr, an Intel senior fellow said that it will allow Intel to fabricate chips that achieve the same performance as its current chips but at a reduction of 0.2 volts. Bohr also told journalists that when implemented in Intel's 22nm process node, it will offer "2X transistor density improvements" over its 32nm process node.
Intel said that all the transistors in its upcoming 22nm Ivy Bridge processors will be of the 3D tri-gate variety, meaning that Intel will not only transition to a whole new process node but will bring significant changes in the fundamentals of processor design all in one go. Holt said that Intel will be transitioning some of its fabrication plants to the 22nm process by the end of 2011 and in 2012, though he would not say which fabs are first in line for the upgrade.
As for consumer facing products, the 22nm Ivy Bridge core will end up in Intel's consumer 'Core' line and edge server 'Xeon' line of products. Later on, though Intel wouldn't say exactly when, its low-end Atom processors will also be transitioned to the 22nm process node on an "accelerated tick-tock clock", with Chipzilla saying that it will end up in a "large variety of products including consumer electronics and smartphones".
Bohr said that Intel's 22nm tri-gate transistors will scale to the 14nm process node but added that "it takes more inventions to get beyond 14nm". He added that Intel should enjoy a three year lead over its rivals on 3D transistor technology.
Intel had a demonstration system kitted out with a very early engineering sample of a 22nm Ivy Bridge dual-core processor running at 2GHz. Intel admitted that the drivers were still at a very early developmental stage and, while the system was said to be unstable, it still managed to loop through a few videos.
For Intel, achieving tri-gate transistors is a very important technical milestone and, for its marketers, it allows them to announce that Moore's law will continue to live on. Although Intel has put many years of research into tri-gate transistors, the firm is betting a lot by changing both the fundamental make-up of its future chips and moving to a smaller process node at the same time. µ
Tags: Intel
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Bing... the rest of the industry is switching away from the "superior" (chuckles) gate first process to a replacement flow like Intel (which is odd when they claimed it was cheaper, better and easier to manufacture....)
....So the density comparison is valid as the difference will be there on 22nm when the rest of the folks move to replacement flow
Also if you could not misinform people with "planar technology was not really appropriate for 22nm" it would be nice. You seem to have an internet understanding (press release) of the technologies so I'm not sure how you decide it is not appropriate.
Similarly your 45nm HK/MG is bunk... IB/GF/AMD was simply not ready (and they even had problems on 32nm early on... to the point where they are flipp flopping to Intel's replacement flow in the future). They just weren't ready as early as Intel was (even with the 1 year lag on the node introduction).
They put a pretty face on it with the "it's an option for 45nm if we need it" but anyone in the industry knew that was an utter joke (it's not just a process shift and some tooling, but also some design changes). Not quite the 'drop in' change AMD tried to portray - your talking new masks, quals, signficant reliability testing (burn in, breakdown testing) that you would not do mid-node.
It is good to see people still drink the koolaid... the PR folk must be better than I thought they were.
If I had to guess I'd say AMD fan who's trying to minimize the manufacturing technology gap between Intel and GF (and by association AMD). Everything Intel implements (HK, strain, now trigtae) is because they have to because IBM/AMD/GF have better tech where they don't 'need' to implement these as early..... gothca!
They're comparing the transistor density to their 32nm process, which uses a less dense gate-last method. Note that IBM and others employ the more dense gate-first method at 32nm, so there is less of a difference here.
Also, the earlier planar bulk technology wasn't really appropriate to be utilized at 22nm, anyway, so Intel had to either deploy these 3D gates, or switch to SOI. It seems the former one was more economical to them.
It's a bit like the case of the introduction of HKMG. They've needed that much more for their 45nm bulk tech than others using 45nm SOI. (IBM and others have switched to HKMG only at 32nm.)
I didn't say it's the same in all respects, but that it's 1-gated, as before.
Regarding performance, it's considerably better than planar 22nm only below 1V. At 1V and higher (like in case of processors, active state) the difference is marginal.
"same old 1-gate (FET) transistor" ?
So you have a problem with the name. BFD. This 3D transistor is definitely NOT just the same old planar transistor. This new device is a HUGE deal and if you don't agree, you are either very anti-Intel or just don't understand transistors. By extending the active gate "upwards", Intel is able to make the transistor even smaller than it would be if it were "just" 22nm. As they've said, they get a double boost in performance and power savings. It'll be at least 2 years before their competition can fully respond to what this brings to the table. Just a marketing ploy ? Yeah, right.
There is no 3 gates here, it's the same old 1-gate (FET) transistor, but with a 3D source electrode and gate electrode contact. The "Tri-Gate" name is only Intel's misleading marketing.