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Advanced Vector Extensions will debut at IDF
AS IDF SAN FRANCISCO 2010 draws near, we can’t help but feel the eagerness to see how the latest “Tock”, Sandy Bridge, will perform with the new AVX instruction set.
Back in the Spring of 2008, Intel disclosed the development of a new instruction set, a superset of SSE and the successor to SSE 4.2 that introduces 12 new instructions - AVX.
The new set increases the size of SIMD vector registers from 128-bit to 256-bit, adds 12 new instructions as well as allowing instructions to have three operands instead of just two. This actually means that code execution efficiency should go up a bit, as well as providing some nifty floating-point juggling that will accelerate multimedia operations considerably, according to Intel. AVX is also said to cater to CPU parallelism and power efficiency - two driving forces of today's CPU development. Increasing the scalability of parallel computing apps – something that will definitely appeal to the HPC crowd.
Sandy Bridge, which will make its debut at IDF San Francisco 2010, will be the first processor in Intel’s ranks to feature the instruction set, and it will almost certainly stretch its legs during the event. Through the use of AVX instructions, the peak GFLOPS throughput is said to increase to 32 double-precision GFLOPS per core on Sandy Bridge processors. OS support, of course, is also vital to get this instruction set to work, so as long as you'll be using Windows 7 SP1 or later, that is, about the same time as Intel launches Sandy Bridge, you'll be good to go.
If you’re in the software optimisation business you might be tempted to drop by IDF to see how you can get that old SSE code running as new AVX instructions. µ
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Business applications would benefit greatly if they do.
You need a OS patch because these wider registers need to be saved on context switch. Fortunately, the save/restore mechanism has been made more general than it was in the past to try to future-proof use of these registers - to my knowledge, once you get AVX save/restore right, you won't need a path to handle a later move to 512 bit (or wider!) registers.
I only wish that they'd implemented 256-bit integer operations in this release (not just floating point); there's still no announced timeline on widening the integer path to the best of my knowledge.
Since when do you need a particular OS (and OS patch) to use CPU optimizations? If they are going to play it like that they can keep shove them, it's freaking ludicrous.
Sand Box Mill, New term. Bulldozer goes back to drawing room for full year. Bobcat gets break.
AMD Seems to go contrae to info two days ago, & putting Bulldozer back into box. Sandy Bridge Goes First, late '010. Then Bobcat in portable & low end, picking up & delivering Fusion, Yet Not Top Stuff. Then finally, in ~365 Days, More if 2011 turns out to be Leap Year, Less if Mayans Calendar Wipes Out World. Its' anybodys guess again. Intel first, then AMD Pickup. then finally Fusion on TOP.
Looks like INTEL will lead charge, although pundits claim Buldozier will reign supreme, in end. at least in price/performance. Lets see, this all started in 2007 or was it 2006. or was it.... thats what Friends Are For,dying OFF.
vondrashek