Micron will shift to sub-25nm nodes

MEMORY CHIPMAKER Micron has said that it is ready to move its NAND flash process technology to sub-25nm nodes next year.

Kevin Kilbuck, director of NAND market development, said the company will enter the sub-25nm technology era in 2011 about one year after mass production of 25nm-made products in mid-2010. He added that it also plans to develop its charge trap flash (CTF) technology, a replacement option for the current mainstream floating-gate NAND technology.

Kilbuck told Digitimes that Micron will introduce new NAND products that will feature the EZ-NAND specification. The chips will operate more like storage media than memory, and an 8Gb device will be capable of storing 2,000 songs or 7,000 photos like a DVD.

The Open NAND Flash Interface (ONFI) industry working group recently began work on the new technology specification, which is expected to be completed in the the middle of the year.

EZ-NAND builds ECC (error checking and correction) into the NAND die rather than in the system, which will remove the problem of the host controller having to keep pace with ECC requirements. µ