Just what is it about the phrase get stuffed you don't understand?
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TSMC 40nm yields are disappointing
ONE CHIP MAKER is having a hell of a job increasing the yields of the wafers it fabs on its 40nm process.
According to Digitimes, Taiwan Semiconductor (TSMC) can't get its manufacturing process to yield more than 70 per cent, which is causing huge problems for the production of next-generation graphics processors and FPGA (field-programmable gate array) chips.
It is starting to look like some 40nm products are going to be thin on the ground thanks largely to TSMC's chamber matching problems. The outfit admitted that there was a problem last year but was sure that it would be fixed by the end of 2009. It is not clear if it has fixed the problem yet but it still has past shortfalls to overcome.
TSMC is the foundary of choice for GPU vendors AMD and Nvidia as well as FPGA chip supplier Altera.
Other chipmakers are apparently also running flat out trying to cover the hole that the failing process has left in chip production rates. µ
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Wow, if that yield percentage is accurate, TSMC would really appear to be struggling. This isn't even having incorporated hi-k / metal gates yet. Intel had much better yields on the 45nm hi-k process even early in that technology. A $5k wafer cost is pretty cheap for 40nm, though I have no idea what their wafer start numbers look like.
Of course, as noted above the chip design (redundancy, robustness), overall defect density and transistor performance targeting/variation all play roles in limiting the final yield.
Please write a stinging technical article on this for The Inq. Please. Pretty please, although that is pushing it a bit!
$5000 is a reasonable estimate for the latest process wafer cost. But if you do not like it use your own figure. At the current "yields" the differential is going to be the same about 5x more expensive per unit for Fermi GPU. Even at similar defect rates per wafer Fermi will still cost about double what Cypress does. Just the way it works.
Where does this number come from? IS this a public quote of what TSMC charges for a wafer at 40nm or something from an undisclosed hat?
If TSMC have improved their yields from 40% to 70% in the past few months, then AMD and their other customers will be far happier. They would have been worried that they wouldn't get above 50%!
And at <$40 a die for Cypress (and how cheap would the new 400SP Redwood be, at ~110mm^2?) AMD hopefully are making a few bob whilst they can!
Better than Toms Hardware who claimed AMD were getting 4% yields yesterday...
reportedly
Yield percentages are a function of how big and how complex each chip on the wafer is. Put a small and simple design on the wafter and you'll get near 100% yields.
AMD's Cypress GPUs, which are by no means small and simple, are reportedly yielding between 60 and 80%. That's not at all bad for a leading edge process. Translating it into cost numbers, you'll get about 200 Cypress chips out of a $5000 12 inch 40nm wafer. 70% yield equates to a cost price of about $36 per chip.
nVidia on the other hand are reportedly getting yields of about 20% from their rather larger Fermi chip. You'll only manage to fit something like 120 Fermi chips on a 12 inch wafer so a 20% yield gives you 24 good chips at $208 per chip. That's not so good.