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Video: Intel showcases 22nm wafer

IDF 2009 Next generation silicon on display
Wed Sep 23 2009, 00:42

IN HIS KEYNOTE speech opening the Intel Developer Forum in San Francisco, Intel's president Paul Otellini showcased the company's upcoming processor roadmap, including the first public showing of a 22nm wafer. µ

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Picture of 1.0766M IOPS....

In spite of Editor spitalating out Million in my above post, an Orthodox Sinner from Ham, heres something more On Subject You Might Be Intrested In.

http://www.semiaccurate.com/2009/09/22/larrabee-breaks-cover-last/

Pic at bottom of page & surprizingly, Just one card has 7 SSD in it, it is loaded with memory chips. However, its actual GB of Storage isn't Larger than Most SSD today.

DRASHEK TS from TS.

posted by : Love Those Junkies...., 23 September 2009 Complain about this comment
@ Moores law junkie

You did it on purpose or what? Point in my text the exact location where I mention Moore's law... That's exactly it: NEVER. You have to be a very limited individual to have missed my point by such a formidable gap.

I'm fully aware of Moores's law, its meaning and implication, I don't need your insulting patronizing counseling to remind me.

Since you seem to have problem understanding what I'm talking about, let me patronize you for a moment.

You see, there IS a physical limit in shrinking transistors. Physical in the sense that beyond a certain point, there is not enough atoms to build the electron gate within the transistor.

Also, at a certain point, say 8NM, the gate is so small that weird quantum effect start to disrupt the electron flow. That would mean the IC is NOT usable beyond that limit.

We are near that maximum reduction, no matter how you stack the transistors, that's not my point. My point is the reduction limit of the size of the process. You got that??

Now, since we have nearly exhausted the physical reduction capability of silicon, I wonder what kind of new process and/or element will be used in the next paradigm that will come after integrated circuits. If paradigm is to complex of a word for you to understand, go to wikipedia and learn what it means in the context of my original post.

Ramon Zarat.

posted by : Ramon Zarat, 23 September 2009 Complain about this comment
AMD + IBM = 0?

just wondering about the comment of Intels competition shipping zero 45nm parts? WTF
I'm pretty sure I can get a 45nm Phenom or a PS3 slim if i really wanted to :P
Or does he mean HiK which everyone else gave up on in favour of SOI?

posted by : Alex, 23 September 2009 Complain about this comment
Do people understand Moore's law?

Moore's law is not merely shrinking transistor size via lithography - it is a doubling of transistor density.

When people say the "wall is coming", they speak to simply a lithography wall, not a transistor doubling wall. There are stacked chips and alternate geometries which will further push Moore's law beyond the (myopic?) point of view that Moore's law is simply litho scaling.

Capiche?

posted by : Moores law junkie, 23 September 2009 Complain about this comment
Drashek

Drashek needs to go.
Never before has idiocy on the net actually pissed me off.

What little is left of the INQ staff, please be diligent and delete any Drashek nonsense.

posted by : Brian, 23 September 2009 Complain about this comment
The wall is comming

I wonder when we will hit the silicon wall. At the current pace, not in a very long time. 2025 at most I guess.

What is the theoretical limit number again? Around 8-12NM if my memory serve me well? Intel will never tell, but I also wonder what they are working on for the next Paradigm. We went from mechanical computer to vacum tube, to transistors to the integrated circuits currently in use. What's next?

I'm aware of all the options currently known such has quantum computer, self assembled molecular 3D computer, DNA computer, photonic chip etc... But what is Intel ACTUALLY working on right now to replace silicon ICs?

Ramon Zarat

posted by : Ramon Zarat, 23 September 2009 Complain about this comment
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