The G-7 oligarchs are exporting jobs to third world countries faster than free guns at a prison break - A reader
AMD IS MASSIVELY updating its roadmap again, but instead of the rip and replace that has been the norm of late, it is a planned evolutionary change. There are new cores, new sockets, and new marketing terms, hang tight and we will bring it all to you.
The most interesting thing is that there will be not one but two DDR3 sockets in Q1 of 2010. You know about Socket G34, the general outline of the roadmap, and on the desktop side, things are pretty explicit too. AMD is going to split sockets in the server market, 2S and 4S will be G34, a four-channel DDR3 beast with three DIMMs per channel, 12 per socket. Not bad.
Not one but two new sockets
The new socket is called C32, and it is basically for non-MCM CPUs. It serves the 1S and 2S markets as well, but this bifurcation is a real shift in how the server market is differentiated.
On the CPU front Magny-Cours is the 45nm version for G34, and the 32nm shrink is called Interlagos, listed as 12-16 cores. The C32 variants are four-six core Lisbons at 45nm, and six-eight core Valencias at 32nm. They are set for Q1 2010 and 2011 respectively, but we hear Magny-Cours will be Q4 2009.
The G34 chips are called the 6000 series, C32 are 4000 series, and each has nine SKUs across three power ranges. Additionally, the 4000 series will have higher clock speeds, 6000s will have more cores but at a lower clock to maintain the power envelope.
The biggest news are the 2012 and 2013 platforms, cunningly called "Next Gen Platform". These are also split between 2/4S and 1/2S. We are not sure which country the 'Next Gen' track is in, but the F1 season isn't half over yet, we may see it yet.
The core the C32/G34 chips are based on is Shanghai, and the upcoming Istanbul. We told you a bit about them in February, and it has been pulled in from Q4 to Q2, the sharper among you will note that we are in Q2. Istanbul will ship in June, six months early. That also bodes well for Magny-Cours arriving this year, but AMD isn't saying that yet.
In addition, there are updates to AMD-V along with a new code name, AMD-P. AMD-V 2.0 brings you AMD-Vi, basically an IOMMU. This hit with the 'serverised' version of the ATI 870 series chipset along with Socket G34/C32. It may sound like small, but this should crack the door open for peripheral virtualisation, something long, long overdue.
AMD-P 2.0 adds APML (Advanced Power Management somethingthatbeginswithL), basically remote management for the hardware. If you remember vPro, it is much the same but more 'standards' based. If you are in a large enterprise, this kind of thing makes you weak-kneed, but it is kind of a yawner for the rest of us. Either way, AMD is pushing forward in the power management space.
One other buzzword to toss into the ring, DCA 2.0, Direct Connect Architecture 2.0, and AMD lists this as Socket G34. There is nothing hugely new here, the official slides have it as 12 cores, four-channel memory controller and four HT links, but nothing new-new.
So, the core counts go up, HT bandwidth goes up, and there is more of everything. Toss in HT Assist, aka a snoop filter, and things will likely work a lot better than the last time they tried to go to large socket and core counts. This roadmap looks quite doable, and with all the pull-ins on the current roadmap, things are looking up as well. µ
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