INTEL HAS INTRODUCED its 32nm process technology with its second generation high-k + metal gate transistors, building on the firm's 45nm process tech.
Chipzilla says it's close to ramping 32nm process technology to manufacture the 32nm Westmere version of Nehalem. The company demonstrated a working 32nm Westmere processor for the first time today, smugly noting the firm was well on track with its 'Tick-Tock' model.
Intel says the foundation of the 32nm process technology is the second generation high-k + metal gate transistor, which has seen its oxide thickness slashed from 1.0nm on 45nm to 0.9nm on the 32nm process, while gate length has also been reduced to 30nm. The firm reckons this enables a >22 per cent transistor performance gain and says it continues to scale its transistor gate pitch 0.7x every two years, with 32nm currently stepping up to be the tightest gate pitch in the industry so far.
Going down to 32nm, Intel also boasts leakage current has been reduced >5x from 45nm offerings and >10X less leakage when it comes to PMOS transistors.
32nm, Chipzilla's 4th generation of strained silicon technology, is something Intel boffins are getting very excited about, with the latest company whitepaper noting, "The 32nm SRAM test chip is a testament to the health of not only the 32nm process, but also of the health of Moore's Law."
By moving to 32nm, Intel was able to reduce cell size from 0.346um2 in 45nm process technology, to 0.171um2 for 32nm. Intel points out this means it is continuing to shrink its transistor size by 50 per cent every two years. Intel calls this its "innovate, then shrink" strategy.
The company has also announced that it will be channeling some $7 billion into four US fabs over the next two years to transition its processor lineup to 32nm. D1D fab in Oregon is already in operation and D1C in Oregon will come online in Q4 of 2009, to pump out more 32nm products. In 2010 Intel will add Fab 32 in Arizona and Fab 11X in New Mexico to the mix.
Westmere-based processors will purportedly push Nehalem into the mainstream, with smaller processor cores and the introduction of a Multi-Chip Package (MCP) with integrated graphics bunged into the processor.
Intel also says it has plans to transition all its key Xeon server segments to 32nm process technology.
Apparently the Clarkdale and Arrandale mainstream platforms will get a bit of a dramatic repartitioning makeover, too. Intel points out that today, mainstream PCs are segmented into three chips with a processor and a 'Northbridge' (GMCH), containing integrated graphics, a memory controller, display and the Manageability Engine behind Intel vPro, as well as a third chip - the "Southbridge" (ICH) - primarily controling I/O functions.
Moving to Westmere, the integrated graphics and memory controller will now all be packed into the processor in a multi-chip package. The graphics and memory controller will be a 45nm chip in a package with the 32nm processor core die.
The second chip, which will be dubbed the Intel 5 series chipset, will include the manageability engine for vPro, the I/O controller and the display capabilities.
The firm also notes that whereas, typically, few (if any) enhancements are made to processors when shrinking the die to new processes, Westmere is an exception, with brand spanking new microcode instructions for accelerating encryption and decryption algorithms bunged in for good measure.
Production is expected to begin in Q4 2009 and Intel is keeping tight-lipped about any launch dates. µ
Intel talks 32nm Westmere
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