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Rambus aims for a terabyte of bandwidth

Cunningly called Terabyte Bandwidth Initiative
Mon Nov 26 2007, 13:32

THIS WEDNESDAY, RAMBUS will be announcing its Terabyte Bandwidth Initiative (TBI), aimed at eventually hitting that magic TB figure. It all about bandwidth per device, not aggregate, and with the things it is showing soon, it can be achieved.

To put that in perspective, the PS3, a Rambus licensee, has about 50GB/s in bandwidth, so in three years, it aims to pump that up by 20x. To do this, it has three key technologies, 32x data rate, Flexlink C/A, and Fully Differential Memory Architecture.

The first one, 32x Data Rate is like DDR on steroids. DDR is dual data rate, or two bits per clock. Rambus has been pushing that envelope for a bit, and XDR memory uses 8x data rate, or 4x what DDR does. The new 32x Data Rate ups this to 16x DDR, per clock, and 4x that of XDR. With the same 500MHz base clock, you can get 16Gb/s per pin. It looks like this.

alt='32x_data_rate_rambus'

If you do the mathematics, a device with 16 DRAMs each at 16Gb/s with a width of 4B per device will get Rambus there. Think about this for graphics chips, and the like which today are only just breaking the 100GB/s barrier.

The next chunk of this is aimed at the command and control bits, pun intended. Flexlink C/A brings the same high speed links that the data bus has to the command/address link. Basically, instead of having a parallel bus for the command and address bits, you get a single high speed point to point link.

That means you only have to route one type of signal between the memory controller and the DRAM, theoretically simplifying things. You also need to route many fewer wires. If you need more granularity, you can just add more wires, something that was very hard the 'old way'. Rambus also pulled in some of the phase compensating technology from XDR, called "Flexphase", to work here.

FDMA is the last one, and it builds on the Flexlink C/A to get you a fully differential memory interface. DDR3 has only the clocks as differential signals, DQ and C/A are all single ended. XDR has differential DQ but C/A is still single ended. TBI makes it differential end to end.

On Wednesday, Rambus plans to demo this technology working on production targeted parts. It is not planning to use special materials or building techniques, just was is, or will soon be production processes.

If you remember, TBI is the Terabyte Bandwidth Initiative, the idea is to make things work in the real world, not an idea that would ever make it to volume. One thing is clear, bandwidth on this scale will be needed sooner rather than later, and if Rambus can demo it working in a few days, it stands a good chance of making it to devices in 3 or so years. Let's hope it gets there. µ

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Comments
Hmm, interesting

Personally, Rambus is a company that leaves a bad taste in the back of my throat. I remember all too well its duplicity and its outright mafia tactics on DDR.
That said, terabyte bandwidth is indeed going to be needed, and the sooner the better. So, if Rambus does manage to pull this off, I think it will be a good thing for everybody.
Now what I would like to know is the official status of this technology with regards to JEDEC. Are there patents, or is this going to be open to the public like DDR ? And, most importantly, who is Rambus going to sue this time ?

posted by : Pascal Monett, 27 November 2007 Complain about this comment
RAMBUS?

Nice for people that want to upgrade to a Pentium IV.. I guess :)


posted by : W.-, 27 November 2007 Complain about this comment
SSD ONLY, NO MEMORY SLOTS AT ALL.

Obvious question is why have any memory at all? Use 600 mb/sec ssd as direct storage & memory. Bet its little change of scene behind sudden new invention here, BECAUSE MEMORY AIN'T CHEAP.

sAME CHIPS GET 50x MORE DINERO IN DDR PER GB, BESIDES BEING CLUNKIERS, than hd?

Certainly Ultie_Tom is dreaming in heavon, that mystical space of terraflops/ bandwidth.

Ultie iknows that to work whole show today had to be crimped down to slowest setting. about 8 mb/sec in Ultimate, to reduce failures. Latest mainboards are better than last summer, yet Ultimate is HUGE & needs lot o' fast action if its' to use all its muscle. By Not having to pick snippets off revolving platter, where even at 7,200 snippets/sec, cann't get close to near momentus BLAST that SSD or any predicted super fast memory gets, -=Instant=- hardrives of same revolving bandwidth class are scsi & not capable of all robust playing that desktops challenge o/s with. So U.L.T.I.E., RoadMap thickens & asscent up Great Ultie begins.
thomas von drashek

posted by : Ultie_Guy, 26 November 2007 Complain about this comment
TBI

Post Sherry Garber, Jack Robertson, son, Bert McComas, et al, you 
guys now write a pretty decent
article. What ever happend to that crew?

One of these days RMBS will prevail in their litigation. You ain't seen nothing yet!

posted by : jerome w keyes, 26 November 2007 Complain about this comment
aboutus
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