With Intel systems, at least before CSI kicks in, the North Bridge problem is that you have to squeeze in both the dual-channel memory controller and FSB link to the CPU, plus all the PCI-E lanes required for parallel graphics and the I/O links. This could lead to some nasty pin-count ASICs, unless you go the Nvidia NF 680i way and use another bridge over HT to add the extra PCI-E lanes.
ATI's (not yet DAAMIT then) answer at Computex was clear: 2 x PCI-E 16 lanes in those two graphics slots, plus one PCI-E x 4 slot (x 16 connector) for the physics accelerator - that was when ATI started pushing the idea of on-GPU physics chippery and demoed the X1900 chips doing it all over the place. All seems to have gone quiet since then on that front. ANyhow, that was on top of extreme overclocking possibilities, plenty of interfaces, fast memory controller and few more PCI-E lanes for other peripherals, and so on.
Then DAAMIT came to be, and so did many other things, including uncertainty over the fate of this chipset, coupled with substantial success and performance-crown-snaffling by the Nforce 680i. After all, Intel has not too much interest in its chief competitor influencing its systems, nor did AMD have much interest in creating a 'too good' chipset for its, well, chief competitor.
So when, after all the delays and other shenanigans, DAAMIT's RD600 finally appeared, we were hoping to finally see the long-promised, pole-position competitor to the 680i. But what a disappointment!
The number of PCI-E lanes, at 2 x 8 plus 1 x 4, remains the same as on the two-year old Intel D975XBX 'Bad Axe' mainboard! This definitely won't compete with the Nforce, and frankly it won't stand a chance against Intel's upcoming chipsets a few months down the line.
So why such a long release delay, since the RD600 chipset demos seemed to work well at Computex and the guys in charge were saying it was about launch-ready? Maybe, after the merger, the new boss re-evaluated the positioning and asked for a revision to, say, halve the number of PCI-E lanes and do a "down differential" as compared to the offerings for its own chips - and that would need some time.
After all, its not as if they really counted on Intel's customers for its future chipsets. µ