AMD building for fab future

AMD kicked off its analyst day today with a presentation that underlined its progress from low-volume, problem- plagued manufacturer of the early 1990s to its current eminence as one of the most efficient processor makers on the planet.

Daryl Ostrander, AMD's SVP of logic and manufacturing - or "the fab guy" as he describes himself - went through an exhaustive list of plans to give the chip maker the volumes to take best advantage of its golden run on performance.

These include optimising Fab 36 in Dresden, Germany to produce 25 percent more wafers in the near term, a new bump at its Singapore facility, more research and development spending with partner IBM, and the announcement that partner Chartered has begun 65nm production.

Chartered is a "huge success", already six weeks ahead of schedule, and a "major, major supplier", Ostrander said.

AMD is on track to have 65nm parts in volumes in the second half of this year and is making solid progress on next-generation 45nm parts due towards the end of the decade.

The proprietary APM framework was helping AMD to make improvements in terms of yield and inventory, he added.

Perhaps carried away by this litany of happy news, Ostrander even ventured a metaphor of the mixed variety.

"Were trying to look at the whole enchilada and make it a lean, mean machine," he said.

AMD then raced through a round-up of product plans, including the Dynamic Independent Core Engagement (Dice) technology to improve power efficiency by throttling back on non-active cores to offer a 60 percent or better annual improvement in performance per watt.

"We think it's a major advantage," said Phil Hester, AMD CTO.

In terms of big-iron replacement systems, Hester also sketched out plans to be able to hook up four 16bit HyperTransport links or eight 8bit links for traditional SMP systems or blade structures.

AMD CEO Hector Ruiz took the obligatory pop at Intel, saying, "We need to break free from the illegal stronghold a monopoly has on this industry." µ7