The Intel Tejas Affair explained

CHAOS, PANIC, DISORDER, INTEL, turmoil, lollipops. One of these things does not belong.

Getting back to reality, Intel ripped up and tossed out almost all of its roadmaps this spring, that much we know. The question no one has answered is why?

Why did it toss out a CPU that by all accounts was weeks away from tapeout, and the insiders said was really all that it should have been? Intel was getting its act together, then out came the knives.

So was it heat? Performance? Ramping? Pentium Ms going to obliterate them? None of the above, it was simply a marketing choice. Intel got its 90 nanometre act together late last year, the problems with Dothan and Prescott have been design, not process ones. Dothan had two nasty 'problems' that delayed the chip by six or more months.

Prescott suffered from a variety of maladies, and the 3.4s were not available at launch, anywhere or at any price. 3.2s were scarce as hell, and 3.0s were uncommon to say the least. When Dell dropped the chip, it was a bad sign. Rumours swirled, the peanut gallery was a-twitter with just about everything you can think of. All this chatter was simply wrong.

Step back a minute, what does Intel do. It makes little bits of silicon with neat patterns on them. They are the best in the world at making those little things measured in mm on a side by the acre. There is no one that comes close to Intel on the manufacturing side, it is in a class of its own. This means it can make the chips cheaper than anyone, and from what I have seen, this is the overriding concern at Intel. Cost, cost, cost are problemos number one, two, and three in CPU design.

When Prescott was released, Intel was talking about the fastest ramp in its history. It wanted to make everything 90nm as fast as it could because it lowers manufacturing costs. Lower cost, higher margin, and it can either make stockholders happy, or pummel AMD into a stain with the High Holy Hammer of a price war. It knows this and has a history of doing so effectively.

This fast ramp to high profits is why Tejas had to die. A while ago, the decision was made to ramp the 65nm process on a Prescott derivative, not a Tejas one. Tejas would come out first, but Prescott Mark II would be the ramp vehicle. This decision was not made as a bar bet among architects, it was made for very carefully calculated business reasons.

This reasoning was the final step in a long line of decisions, steps and missteps. The architectures for Willamette/Northwood, Prescott and Nehalem were decided upon years and years ago, and what we have seen, and are seeing are the very end of the cycle. Nothing you will be able to buy in the next year or two can be changed now in anything more than a minor way.

That leaves engineers with designing what they are told to design by the architects. This is the hard part, and if you read the recent Barrett memo, something that is a front burner affair at Intel. The chips that are coming out now have come out a bit later than Intel would prefer. Prescott was six months late, and not quite what it was planned to be. All sources point to a cut-off date and what made the cut was what ended up in Prescott.

The stuff that didn't make the cut went to Tejas, Cedar Mill, or any of the other projects that got shuffled in and out of the roadmaps during this period of time. The lateness of Prescott meant some delays to Tejas. Tejas in turn was a little more delayed on its own, nothing huge, but a little delayed.

Since Tejas was meant to be a 90nm project, the 65nm derivative was going to have to start from a code drop of the 90nm part when it was stable enough to take and fork. The delays to 90nm Tejas meant delays for when the 65nm squad could pick up the ball and run. Those starting delays obviously meant ending delays, and until the 65nm chip's design is done, there will be no 65nm chips for Intel to produce. No chips to produce on a process, no move to that process.

Each process shrink takes a given microprocessor and, roughly speaking, halves the largest component of its cost, the area of the chip itself. This means that if you make these chips by the tens of millions as Intel does, those little savings on each chip adds up frighteningly quickly, and that $4 billion you need to spend on a new fab suddenly makes a lot of sense.

So, with 65nm bringing a lot of cost savings, and its leadoff chip being delayed by 6-9 months, that would mean the 65nm process would be delayed by the same amount. See the problem?

The solution would be to launch Tejas at 90nm, and put out a stopgap version of Prescott at 65nm, then launch the 65nm version of Tejas when it was ready. This left Intel with the prospect of having Tejas be a niche, high performance product, most likely an EE branded chip. Tejas would come out first, then be supplanted by a lower performance model, then the higher performance version would come out again.

The marketeers must have curled up in a ball over this prospect, it could be taught in school as a lesson in how to confuse your audience 102. 101 is the current numbering scheme, but ask me about that one later. So, the marketeers could market themselves into a corner more than they are doing now, delay 65nm ramping, or knife the baby. Wahhh.....stab stab stab. Nothing to see here, move along now. µ