Intel bangs whimper

ABHI TALWALKER ENDED THE KEYNOTE on Tuesday with a bang not a whimper, or at least it was shatteringly exciting compared to what came before.

There were a bunch of large Itanium servers on the stage with Abhi, but they were not terribly exciting, they just kind of sat there, all ten of them.

Other than occasionally blocking the view of the fridges, Abhi did talk about things, most notably the direction of future server processors. There are four points to consider, a platform approach, power, virtualisation, and manageability.

The first thing, platforms, was pushed by everyone at just about every keynote. While it is a perfectly valid thing to stress, and is becoming more and more important every day, there was a distinct lack of chip performance talk permeating IDF. If I didn't know better, I would swear there is some sort of problem here.

Platforms are for railway stations. The platform approach is a sound one, as chips grow faster and faster, their need for I/O goes up, and the tuning of the things around the CPU can have more of an effect than the chip itself. By treating the whole thing as a single so called platform, you can bring all parts up as one, and avoid a lot of bottlenecks.

When something isn't a platform, it is a solution. Which is wetter than a platform, except when a platform is an open air platform in the rain.

Power is another point of concern, and some say that it is the reason that Intel can't scale clocks of late. While it is a contributing factor, there are ways Intel plans to deal with this. DBS, or Demand Based Switching is the big one. It is Speedstep mark II for desktops, and it does work quite well. This technology allows the chips to throttle down clocks and lower voltages to lessen power use.

DBS is dynamic and depends on workload. To show this, Intel had a DDR and a DDR2 based system running the same two Xeon CPUs, and both were running the same task. Due to higher efficiency, the DDR2 system had a little CPU power left over while the DDR system was maxed out. The DDR machine had visible stuttering in the tasks it was doing, while the DDR2 one was smooth. DBS allowed the DDR2 machine to throttle down a bit, and power was saved. DDR2 is the 'platform' bit, and DBS is the power management. Catch the synergy? Remember when Siemens and Nixdorf merged?

Virtualisation was the next order of business, and it is basically hardware assist for VMWare type apps, or Vanderpool tuned for the server. Since Intel won't say that it is basically a reworking of instructions commonly used in VMs for a lower cost, I won't tell you that. I also won't talk more about it until I 'can'.

Last up is cross-platform manageability. As we said in the earlier half of the keynote, things like this were stressed to the point that I admired the weave patterns and chrome plating of the chair in front of me. It was better than ritual suicide, which was the other option. It is just what it sounds like, the ability to manage many platforms at once at a presumably lower cost and less complexity.

Other than that, there were a host of facts and figures thrown out. Itanium revenue has gone up 3x year over year, and 10x in the 64+ CPU category. Can you say thank you SGI? Knew you could. Also, software available has gone up 100%, with over 2000 packages ported so far. To put that in context, it is about 2/3rds the number of Pokemon titles released in June for Nintendo handhelds.

They seem to have come to the same conclusion that we did, that Irwindale will be out in 2005, but they didn't give us credit for being first. They also showed working FB-DIMMs (link: http://www.theinquirer.net/?article=15167) on an oscilloscope. Then it was back to cribbing our code names, they 'independently' came up with the name Montvale for the 65nm shrink of Montecito, Cranford, and Whitfield. Also, they said there would be a low voltage Montvale part, cunningly named DP Montvale + LV. We take no credit for that one. µ