Intel talks multi-threading talk

THE FUTURE OF HYPER THREADING technology on Intel processors, possibly with Alpha Inside, got an airing at the Microprocessor Forum yesterday with Glenn Hinton and John Shen taking the audience through some of Chipzilla's Jacksonville plans.

Hinton opened by contrasting single stream performance on processors with "thread level parallelism" involving four CPUs attached to one system bus.

Long latency memory (DRAM) access needed memory level parallelism, he said, showing a chart of a "future CPU" measuring peak instructions during DRAM access which appeared to best anything Intel had introduced before by a factor of five or six times.

There is an opportunity, he said, to exploit thread level parallelism in today's software.

Using a series of diagrams reminiscent of Rubik's Cube, Hinton demonstrated the advantages of switch on event multi threading versus simultaneous multi threading.

SMT, he said, offered the most efficient and highest performance option, giving more CPU performance. Hyper threading technology will execute two tasks simultaneously - either two different applications or two threads of the same application, with the CPU maintaining its architectural state. He then apparently demonstrated HTT on a prototype Intel Xeon, suggesting that it is likely to be used in future versions of these processors, although the timeline slide he showed had no dates on it.

Future MP (multiprocessing) Xeons will use hyper threading technology.

You can find the entire presentation by downloading a 5MB PDF from here. µ