TSMC does the process shuffle

THE COMPETITION between foundries is as cut-throat as that between GPU makers. But since end users are not the target of marketing in this industry, we rarely hear about most of the jockeying between these companies.

TSMC is probably the most visible of the foundries, as its name is continually bandied about by ATI and Nvidia in their never-ending struggle for graphics dominance. It is also the largest foundry in the world. The only other entity with more Fab space is Intel. Right now TSMC's process du jour is 90nm Low-K on 300mm wafers. This is the primary process that ATI and Nvidia are using for their current line-ups of chips. Lots of other third party semis also use this process as well. But where exactly is TSMC sitting for the next year?

I do need to add a disclaimer here. When I am talking about the products and timelines based on TSMC's processes, I am mainly addressing large, complex chips like those produced for the graphics firms. The timelines for these processes are often pushed back with these larger designs, while smaller and more specialised products are the first to see daylight from these new process nodes.

TSMC has made a good name for itself by utilising half-node jumps in its process march. Examples of half-nodes are 220nm, 150nm and, most recently, 110nm. This allows TSMC to offer its clients a more size-optimised process with nearly identical transistor performance to the process above it. This means that 110nm was about 15% smaller than 130nm, but had the same performance as the 130nm FSG process.

Typically the half-node jumps do not include new technology, but TSMC bucked that trend with its 150nm process, which was its first to utilise copper interconnects. Now TSMC is looking to do something like that again with three flavours of 80nm product.

Eighty-nanometre as we know it is based off of TSMC's 90nm Low-K process. Instead of making just a size-optimized half-node jump, TSMC looks to have done something a bit different. The first product is the standard 80nm Low-K with nearly identical transistor performance to TSMC's 90nm Low-K. This means it is pretty much an optical shrink that will gain approximately 15% to 17% smaller die sizes. This is the lowest risk process for manufacturers looking to optimize their die per wafer numbers, all the while retaining the same basic design rules as 90nm. This is most likely the process that ATI will be introducing its new late summer/early autumnal products on. According to some, TSMC's 80nm standard is three to four months late, as ATI was expecting to start production on 80nm parts in early spring.

The other two flavours of 80nm are slightly more interesting. TSMC is offering a high-performance 80nm product line (HS), as well as a low-power 80nm line (LP). The big question many people have is what TSMC has included in these other processes to create transistors with the needed characteristics. TSMC has offered lower-voltage products before, but it seems a lot more aggressive with this half-node this time. Do these process offerings have new tech involved at the Fab level, or is it merely a matter of how the wafers are processed to give the needed characteristics? A third notion is a different layout for the standard cell design TSMC offers its clients using its processes, which can be optimized for high switching speeds or low power consumption.

From all indications the 80nm standard process (GT) is kicking along fine after its small delay, and we are going to see final products in pretty short order. The two other products are still not in full production yet. High Speed is supposed to be open for full production by the end of this summer, and Low Power looks to be closer to 2007. Overall it is a nice portfolio of products for fabless semis, and we can imagine that both ATI and Nvidia are looking at both the HS and LP products with great interest (high performance parts for HS and the mobile variants on LP).

While HS may be a slam-dunk for these large, complex parts the LP process may not be entirely suited for GPUs. Economics and design time may be far larger factors here, and both GPU guys may just pass these other flavours by and go directly to 65nm, after using the 80nm GT process for their next series of products.

Stepping away from the Neapolitan model of process technology, TSMC also looks to add a GC flavor to 80nm which will feature low active and standby power. TSMC says this will be available for risk production towards the end of 2006.

The next big question is where 65nm is. Apparently the standard 65nm line is out of risk production and is chugging away at full speed. The initial products for 65nm are typically smaller, more specialized products and DSPs. This does not include the large GPUs from the big guys. For now, GPUs will stay at 80nm throughout the rest of this year. In early 2007 it appears as though Nvidia may be first out of the blocks with 65nm parts. Mimicking this year's 90nm production run from NV, it will start with smaller, more budget-oriented designs which will culminate to the larger 65nm refresh of the G80. ATI will probably be very close behind with the RV6x0 series of chips on 65nm, and will eventually produce a 65nm version of the big R600.

For the rest of this year it appears as though TSMC's 80nm GT process will be most popular with ATI and Nvidia. This is probably a safe bet on both of their parts, as the time and money spent in using the other flavours may not be economical considering 65nm is nearly ready for these large designs. TSMC has been a great partner for many companies out there, but there are some very interesting products being offered by both UMC and Chartered that could cause a case of the wandering eye. But more on that later. µ

L'Inqs
www.edn.com
www.eetimes.com
www.electronicproducts.com