Intel to take AMD approach to future chips

IT SEEMS THAT the future course for Intel marchitecture is now decided. The advantages of modular design in that its future cores enabled the company to delay the decision all the way until 18 months before release, but now that call has been made.

Almost two years ago, our own Eva Glass brought you the first information about Bloomfield, a product with a fate that was pretty uncertain at the time.

Then, in June of last year, Charlie Demerjian brought you the first story about the role Intel chieftains had decided - Bloomfield will be the successor to Yorkfield (monolithic die quad-core), which is a successor of Kentsfield. And Kentsfield is nothing more but two Conroe dies stuck together. Conroe is.... well, you know.

This desktop component will play a key role in mid-2008, when Intel faces a fight against the successors to AMD's Stars line up from Q3'07. Bloomfield is a key product to attack AMD's Fusion CPU as well, currently scheduled for late 2008. A mobile variant of Bloomfield will be named Gilo, while the server parts are codenamed Gainestown.

So, you know the codenames, but now, it's time to reveal what Bloomfield/Gilo/Gainestown actually are.
First of all, forget about Socket 775 and the upcoming mobile Socket P. The name of the new baby is Socket B, and it features an interesting number of golden-coloured dots on the back of the CPU packaging: 1366.
Almost the double number of 775 connects is required because Bloomfield is a single-die, high-performing 45 nanometre part that features four cores and an integrated memory controller supporting DDR3 memory, most likely in the flavours of 800, 1066, 1333 and 1600 MHz. The real clocks are 400, 533, 667 and 800 MHz DDR, of course. The ,emory controller plays an important role in the architecture, since Intel is introducing an all new Hyper Threading tech. The new HT will be vastly improved over the old one, and the real speedup should be seen in more apps than Cinema 4D and Lightwave 3D of yester year.

New additions to the architecture also include an internal revamp of FPU units and SSE instructions as well, but it's too early to tell what those changes are.

Did we mention that 2008 is the year when Intel's Front Side Bus is supposed to go the way of the dodo? µ