Nvidia's on-chip cache

But we can say we are almost hundred per cent sure that you cannot squeeze that memory transfers from just optimised FIFOs.

Our Mr. Unknown is not going to be available until the end of the week but we left him a message to contact us as soon as he returns from his wild trip to Island Nowhere.

What we're interested in is discovering which kind of applications are being used for tests, as developers have told us they want to know whether its vertex or textures that are involved.

A reader said there are some official papers on Nvidia's site suggesting that the company uses "Quad Cache" in its Light Speed Memory II architecture used in the Geforce 4 chips. Here is what paper says:

"Quad Cache

"The LMA II also includes cache subsystems that are collectively known as Quad Cache. Caches are high-speed access buffers that store small amounts of data and operate at tremendously high bandwidth. These special buffers ensure that data is queued and ready to be written to the memory, and they provide a place to buffer data being read from the memory.

"Quad Cache has four independent buffers optimized to improve the overall graphics pipeline performance. Individual caches store primitive, vertex, texture, and pixel information. These caches are individually optimized for the specific information they deal with. Results or data that have been previously stored in these caches can be retrieved almost instantaneously (as opposed to having to retrieve them from memory or recalculate them). The result is high-speed retrieval of key data that enables maximum performance from the graphics pipeline."

Here's the whole PDF.

This is almost exactly what we had in mind when we wrote the first part of this tale, but we still believe that this may involve large amounts of data rather than small ones. We have asked Nvidia CTO David Kirk to provide us with some whitep apers about CVF - constant velocity FIFO that we mentioned in part two but we haven't heard back so far.

One thing remains unclear to me. If we are right that will mean that Nvidia used this techniques from Geforce 2 chips and haven't said even a hint about this buffer, memory or how ever you like to call it on its chip. µ

See Also
Evidence suggests secret Nvidia on-chip cache Part One
Part Two