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Toshiba claims 32nm breakthroughs

Hello Tosh, got a new chipset?
Thu Jun 14 2007, 15:10
TOSHIBA BOASTED yesterday that two new breakthroughs will help bring 32nm system chips closer to reality.

Presenting at the VLSI Symposium under way in Kyoto, a salaryman explained the challenges. As circuit dimensions shrink, electricity has more trouble flowing, raising the risk of defects. One way to improve current flow, he said, would be to cut the resistivity of the transistor.

Yes, yes, we all know that. but how?

Boffins have found a way, by dispersing dopants in the boundary surface between the transistor electrodes and the silicon substrate. In a prototype transistor operating on 0.7 volt, this method whacked up the current by 35 per cent in comparison with conventional transistors.

Toshiba also improved current flow by putting strain on the resistor. No, they didn't kick it. They buried silicon germanium in a stepwise fashion in the electrode. Ouch!

By combining these two elemental technologies with multilayer wiring technologies, Toshiba sees a road opening up to system chips with a 32nm design rule and beyond. µ

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