Intel to intro tri-gate transistor

WONDERED WHERE the INQ was today? Half of us was on VS20 flying back from San Francisco, the other half was in some night club razzing the night and most of the morning away with ATI.

So let's start where we left off, with Intel technology chieftain Sunlin Chou, who in the last presentation of the Intel show talked about nanotechnology.

He also said that Intel had managed to build a tri-gate transistor, by wrapping two transistors against the walls of one and which Intel will formally unveil on September 17th in Japan. This is part of its Terahertz transistor technology which will allow CPUs to have 10 billion chips on them by the year 2010.

Chou said that the 90 nanometer technology which Intel will use in its Prescott and Nocona processors next year, use gates inside them that are half the size of the influenza virus.

While Intel is looking hard at technologies such as carbon nanotubes and silicon nanowires, being able to implement these technologies posed so many challenges that it was still unclear whether they would be successful elements in future Intel technology.

One of the biggest hopes Intel had was for Extreme Ultra Violet Light (EULV) technology. Lithography, he said, is the chip designers' brush but there's a problem and that is that it hadn't advanced as far as the technology it is intended to implement.

"It's like using a wide brush to paint thin lines," he said. EULV, however, is now close to commercialisation, and will use shorter wavelengths than conventional lithography.

However, in a Q&A at the end of the session, Chou admitted that it might not be until 2007 until EULV became a reality. "It still has challenges left," he said. "We'll use it just as soon as [tools] are available. µ