Dubbed Trips, which stands for tera-op, reliable, intelligently adaptive processing system the chip could be used to accelerate industrial, consumer and scientific computing.
Professors Stephen Keckler, Doug Burger and Kathryn McKinley have been building the chip for the last seven years.
It uses a new class of processing architectures called Explicit Data Graph Execution (Edge) which can process large blocks of information all at once and more efficiently.
It is a change from the "multicore" processing mentality which increases speed by adding more processors. Each Trips chip contains two processing cores, each of which can issue 16 operations per cycle with up to 1,024 instructions in flight simultaneously.
More here. µ
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