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Hector rescues UK government

So where are the 25 million records?
Saturday, 5 January 2008, 20:37

THE UK GOVERNMENT, world famous for its really incredibly crap computing record, has introduced Hector, the UK’s "new" high end computing resource.

Hector does not stand for AMD’s supreme Hector "Jesus" Ruiz, but is instead the "high end computing terascale resource".

It opened last October and is based in Edinburgh, Scotlandstown, England, to very little fanfare.

Hector is supported by Hector’s partners. One of which is Cray. Go figure. µ

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Hectr?

"high end computing terascale resource"
Where did the "O" go?

posted by : Mike, 06 January 2008 Complain about this comment
the UK is an Island

IMHO its the mentality in these typical 'dick, tom & harry' - projects that exposes the good ol' Island economy previously known as the British Empire.

All the talent took the boat/plane/bicycle to get the h*ll off the shoddy island which left the three stooges to do the job.

Nice one England.

posted by : Aryan, 06 January 2008 Complain about this comment
More on HECToR System

Processors, Caches and Memory 
HECToR utilises dual core AMD Opteron processors, with a clock rate of 2.8 GHz. Each of the cores has a floating point addition unit and floating point multiplication unit, which are independent of each other. All functional units are theoretically capable of retiring a floating point operation per cycle. This gives a theoretical peak performance of 5.6 Gflops per core or 11.2 Gflops per dual core processor for double precision floating point numbers. 
In addition to the 64-bit wide general purpose (GPR) and multi media (MMX) registers, the Opterons offer sixteen XMM registers, which are 128-bit wide. Each XMM register can hold two double precision or four single precision words. Streaming SIMD Extension instructions (SSE) can manipulate all the words stored in the XMM register. Their utilisation will typically boost the performance of the application. They also improve the theoretical peak performance of a core to 11.2 Gflops (22.4 Gflops per dual core processor) when manipulating single precision data. 

Each of the two cores of the processor has its own private caches, there are no caches shared between them. There are separate level 1 caches for data and instructions of 64 kB each. The L1 data cache is only 2-way set associative. There is a combined data and instruction L2 cache of 1 MB, which is 16-way associative. The L1 data and the L2 cache use 64 byte cache lines, which translates to eight double precision words. The L2 cache acts as a victim cache for the L1 cache. Data evicted from the L1 cache gets established on the L2 cache. 

There are 6 GB of DDR2 memory installed per dual core processor. AMD's HyperTransport technology is used to connect the processors and their memory. In single node (SN) mode, all of this memory is available to a single compute task, leaving the second core empty. In virtual node (VN) mode compute tasks get placed on both core of the processor. In this mode the memory gets shared between the two cores - giving 3 GB of memory to each compute task. HECToR offers a total of 33 TB of distributed memory. 

http://www.hector.ac.uk/support/documentation/userguide/hectoruser/Architecture_Overview.html#SECTION00022000000000000000

Thanks amdboard.com !

posted by : AMD Phenom, 06 January 2008 Complain about this comment
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