AMD flashes open dual core 65 nano kimono

BECAUSE QUITE a few hacks turned up today rather than yesterday, AMD decided to do its presentation on dual core and multicore processors all over again today.

The same guy did it, but the presentation was more informal and although we insisted on asking the same questions we asked yesterday, as usual we had to read between the lines, and take some snaps.

He flashed open the AMD kimono, but only fleetingly, so we weren't sure what we saw, although we saw for sure something was there.

We did, however, get a value added presentation from Pat Patla, and had the chance to get a few more shots, because the very unthin and light server, carried by three AMD personnel, was opened.

Dual core processors obviously run at less frequency than single chips, but Pat P wouldn't be drawn on that one, although we all asked him the question in different ways.

So what did Pat add to what he said yesterday? We said that presumably when AMD moved to 65 nanometre technology, which it has said it will be able to do next year, it would be able to get four cores on the same wafer rather than just two.

Rather than answer that question directly, Mr Patla decided to suggest we do the sums for ourselves. But he did say that AMD is evaluating whether the gains from putting four cores on 65 nano technology will yield the desired results.

Of course the dual core chips - a photo of the slide is below, largely consist of the 2MB cache onboard. A swift count, which Mr Patla wouldn't do for us, shows very little core logic is needed to propel the processors.

He also declined to say when Microsoft Windows XP 64 would ship although he said he hoped it would be out by the time that AMD shipped its dual processors in the first half of next year.

Anyway, enough of that. Here are the photographs, with apologies as usual. Pictures are not our trade.

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