The future of 64-bit processing II

HP IS IN A unique position, owning or co-owning three major performance-leading 64-bit architectures - the long-time champion, Alpha, HP's own workhorse, HP-PA, and of course, co-development of IA-64 with Intel.

Officially, both Alpha and PA-RISC are consigned to the dustbin of great things unjustly abandoned, but that's life isn't it? HP is even moving good old VMS to Itanium. HP also supposedly was the major brain behind Itanium2 design and resulting good performance.

So, even if X86-64 wildly succeeded, and Intel ever wavered on its Itanium commitment, HP would have no choice but to take over the further development - chipsets to bring the performance out are the first, obvious target. HP zx1 has superior memory performance to E8870, plus added bells and whistles like AGP for workstations. I wouldn't be surprised to see HP be the first with a chipset for any sped-up FSB on, say, Madison 2.

It all depends on how soon a new major Itanium core appears, and how well it performs compared to the competition. Remember, when Alpha was murdered, it already had two excellent follow-on major cores well-defined: the eight-way superscalar multithreaded EV8 (21464), and the vector-based EV9 (21564) with 16 on-chip Rambus channels, which could do some 77 GFLOPs per CPU. In theory, even if the EV9 design re-started only today, if adjusted for a new process like 0.06 um, when it comes, it could be a clear performance leader.

Even if the software houses in the West do not want to support it any more, well markets like China, Japan and Russia are more than enough to sustain it - the existing Alpha compilers are excellent, and give top performance code quickly, without long optimisation and tuning efforts often necessary with current Itanium compilers. So, after all, maybe HP would have the choice.

That is just a hint - common sense has rarely prevailed in computing technology development, more often than not overridden by whatever backdoor corporate plays were the order of the day. So, even though it could provide a clear way out for HP "just in case", Alpha revival within HP is very unlikely. Come to think of it, maybe an outside party could take over the architecture...

While Alpha and Itanium architectures are as opposite as white and black, there still is a lot of Alpha stuff that could find its way into the IA-64 barn. Distributed memory controllers of EV7 and its cancelled follow-ons are obvious candidate (with Rambus maybe changed to DDR2) as Itanium's bus architecture is the most urgent issue to fix.

Another possibility is one that most of The Inquirer readers, and Intel Itanium guys too, were aware of from over a year ago: use EV8 8-way superscalar core design as a model, but instead of eight RISC instructions, the thing could handle 4 or 8 128-bit EPIC bundles per cycle, each with 3 instructions - possible with newer semicon processes for wider, more parallel ALUs, register sets and datapatch to handle the increased load. And what would be the final trick? Well, let the compiler schedule ops within each EPIC bundle, but let the out-of-order CPU execution schedule whole bundles out-of-order.

So, in-order execution within each bundle just like now, but out-of-order bundle scheduling! Hah, just add the EV9-like vector unit, and this could be a monster...

What about the rest of the gang? Well, IBM is POWERing up 4+, 5, 5+ and beyond, while we all watch the Sun-set on the horizon... more on this in my next article. µ

See Also
64-bit future scenarios I