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Intel readies six-core chip
Twice three
Sat Feb 23 2008, 10:59
CHIP FIRM Intel is preparing to introduce a six core chip called the "Dunnington", a processor that will pave the way for its Nehalem architecture later this year.
According to Eclipse, the “Dunnington” was designed in Bangalore, and will use three dual core 45 nanometre Penryn processors with a shared 16MB L3 cache.
It will use the “Clarksboro” chipset, the report said.
More here. µ
Tags: Intel
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Actually the Dunnington will have 3 dual core penryns with 3MB shared L2 cache between each set of cores and 16MB shared L3 connecting all three cores together. 

Total Cache = 25MB !

without an on die memory controller these chips need huge caches to keep all 6 cores fed with data.

I'm waiting for nahalem, even with only 8 megs cache it should perform better since it supposed to have tri-channel ddr3 memmory controller!
Where are the duals/quads ones they have been touting for the last 5 months ? Or are they just prepping us for Q2 2009 . Heck the x48 haven't even hit the street and they are talking P45 ,even car dealers let you get it off the lot before they tell you its obsolete .
It's also possible that it would be a 4mb L2 + 4mb Shared L3.
It's a shared 16MB cache
How are they going to get to 16mb cache?

16/3 = 5.33 so three dual cores with equal cache are out. Using 2x 6mb and 1x 4mb seems strange.

They could use 1 quad core and tack a dual core on the side, but their quad cores at the mo are 12mb/6mb cache. So the dual core would have to have 4mb cache (which would be odd for a penryn) or 10mb cache (which would be a record).

Anyone know what this thing comprises of?

Whichever way it works, sounds like this thing is going to use an FSB so its going to need liquid nitrogen on the northbridge to run it :P