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32 nanometre delights beckon
Selete, not snow - this is no TiN man
Tue Dec 11 2007, 14:35
THE R&D association known as Selete has come up with two process ideas for 32 nanometre tech, reports nikkei.net.
The organisation, which has the full name Semiconductor Leading Edge Technologies Inc, has designed a gate material to replace polycrystalline silicon with silicon oxide as an insulator.
It is proposing chip manufacturers use titanium nitride instead, with magnesium oxide as an insulator for nMOS trannies, and magnesium oxide for pMOS trannies.
It's other cunning plan is a porous silica with half made up of holes and giving a dielectric constant of 2.4. µ
L'INQ
nikkei.net
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I didn't know they made those outside of Thailand! Gotta get some of those in the US.

Kidding.
Fascinating stuff on the inq-hated wikipedia site on porous silicon, seems it was discovered in the 50's in america by accident, and is found that when hydrogenated to be more explosive than TNT, at cryogenic temperatures, and could possibly be used to propel satellites.
http://en.wikipedia.org/wiki/Porous_silicon

Another topical detail: Another positive attribute of porous silicon is the degradation of porous silicon into monomeric silicic acid (SiOH4). Silicic acid is reputed to be the most natural form of element in the environment and is readily removed by kidneys.