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Intel Xeon dual processor 3.06/1MB cache tested

SPECing the Cache-Rich Xeon
Fri Aug 29 2003, 11:00
INCREASING THE dual-CPU XeonDP cache size - or, in essence, reusing the large-cache XeonMP as XeonDP here - was part of Intel's answer to the Opteron arrival. Xeon does suffer from much lower memory bandwidth than the Opteron, and that difference grows quickly as you add CPUs, since Xeons share a common FSB in an SMP system, while Opterons have individual low-latency memory buses on each processor, aggregating the total memory bandwidth (but also arising potential cache coherency and memory speed consistency problems).

So, before the next-generation Nocona and Potomac Xeons arrive, hopefully with 800 MHz FSB at least for DP systems, the simplest solution was to increase the on-chip cache amount by using the already proven Gallatin XeonMP core - its entry-level variety which, besides the usual 512K L2 cache, also has a 1 MB L3 on-chip (but with higher latency than the L2 cache).

With the help of Intel Asia Pacific, we set up a nice reference system with dual 3.06 GHz XeonDP CPUs, intel Bryson server mainoaup to 2 GB DDR266 registered RAM, and Linux as well as WindowsXP running on it, with the relevant Intel (and M$) compilers.

The goal of the test was a bit unusual compared to the common server CPU reviews. We noticed that Intel CPUs have very high SPECmarks these days - Xeon is pretty much the SPECint leader, and its SPECfp scores are also pretty impressive for a CPU with just 8 FP registers (whether in X87 or SSE mode). So we decided to take the actual SPEC2000 v1.2 source code, and try our best with it.

The idea was to see how close can we get to the actual published fantastic SPEC2000 scores by optimising the source code using existing Intel compilers, libraries and tools. We used a Dell system as a comparison baseline, since the Dell system used a faster 875 CanterwoodSE chipset with more streamlined memory controller and dual-channel DDR400 memory. If we got within say 5% of Dell using all the same compilers and tools, we would be very happy.

So, after tweaking with a lots of libraries, here are the results!

Hardware
Intel SE7501BR2 server motherboard
3.06GHz Xeon with 1MB L3 cache
4 x 512MB DDR266 SDRAM
36GB 10,000rpm SCSI hard disk (for SPEC2000)
9GB SCSI hard disk (for HPL)

SPEC 2000 Results Summary*

Benchmark
Red Hat Linux 2.1AS
Win XP Pro SP1
Win XP Pro SP1/
Smartheap
Dell
SPECint 2000
904
1196
1218
1294
SPECint_base2000
878
1174
1181
1242
SPECfp 2000
933
1014
1019
1186
SPECfp_base2000
923
992
1005
1173

As you can see, we did manage to reach 5% - 7% within the Dell range, quite impressive! The Linpack on the Linux was not that impressive, as we hoped for another 12% or so above this result - after all, around 69% of the 6.12 GFLOPs peak value (per CPU) should be achievable. In summary, the results achieved are not bad, and this XeonDP does seem to perform very well in the SPEC2000 workstation-like applications. More tests to follow, including Windows tests against the Opteron... (Benchmarks done by Shee Cheng Yap). µ

Notes
For Dell:

3.06GHz Xeon with 1MB L3 cache
4 x 512MB DDR400 SDRAM
36GB 10,000rpm SCSI hard disk

Software
On MS Windows (For both Dell and Bryson)
Win XP Pro SP1
Intel C/C++ compiler ver 7.1 (20030307Z)
Intel Fortran compiler ver 7.1 (20030307Z)
Microsoft Visual Studio .NET (7.0.9466)
MicroQuill Smartheap Library version 7.0
No hyperthreading (disabled via BIOS)

On Red Hat Linux 2.1AS (For Bryson)
Intel C/C++ compiler ver 7.1 (20030307Z)
Intel Fortran compiler ver 7.1 (20030307Z)
Kernel = 2.4.9-e25 (uniprocessor)
No hyperthreading (disabled via BIOS)

alt='xeon1'

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