Intel shows off 32 nanometre wafer, talks Nehalem

PAUL OTELLINI, Intel's CEO, led the first keynote off here in Moscone West today.

He said silicon technology was the most important element in Intel's future. Fifteen years ago Intel engineers realised that there was an increasing tendency to leakage using silicon oxide gates. The high k Hafnium metal gate 45 nanometre fixes that problem. Gate leakage is down by a factor of 10.

The 45 nano tech gives a threshold level of density for transistors and the power characteristics. Graphics will be introduced into CPUs in the 45 nano generation. Silverthorn cores will provide ultra mobile notebooks. Other firms have announced 45 nano tech but no one else has the Hafnium gate, said Otellini.

Four fabs each costing $4 billion will produce the number of dies that Intel anticipates it will need for 45 nanometre chips.

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The next 32 generation will have the second version of Hafnium gates, and he showed off a 32-inch wafer. They'll be out two years from today.

Penryn will be a 410 million transistor die to be launched on the 12th of November next. There will be multiple SKUs and next year even more SKUs. The packaging for this generation will be 60 per cent smaller. All 45 nanometre CPUs will be halogen and lead free by the end of 2008.

And 45 nanometre graphics integrated with the CPU will be available next year, or possibly a little later.

Larrabee will have a shared cache for software developers.

Nehalem will be a flexible product with the ability to change a number of factors including cache. Nehalem products will be able to turn cores, caches and threads on and off to optimise performance. There will be an eight-core product in 2008 with each core having two threads.

The design is complete and Nehalem was running a month ago, said Otellini. He showed off a Nehalem die. Glenn Hilton, an Intel Nehalem architect chatted about it. The goal was to come out with a new design that was higher performance core and capable of being used across the range of machines.

Nehalem will implement a high-performance DRAM controller with low-latency and scalable bandwidth for memory intensive apps. It uses simultaneous multi-threading. The system interconnect is called Quickpath. They showed off a system which they claimed includes Nehalem. It can run OSes and applications.

Intel is developing a Wimax enabled CPU called Echo Creek in the middle of next year, with a number of vendors committing to producing notebooks that use the chip. By 2012, over a billion people will be covered by Wimax and 150 million by 2008.

Intel has shipped 10 million mobile Santa Rosa platforms since launch and, in mid 2008, will launch the Montevino platform with a new chipset with integrated wi-fi and Wimax that will support both HD formats. There will be a 25 watt version available. Montevina is out of the lab and products will ship next May. µ