VIA to support half-channel RAM

VIA, DESPITE ITS fair share of slip-ups and delays, is being quite canny with its next generation of products, and is optimising them for small and mobile devices in some very smart ways.

We've come across one which has got our motherboard designer chums very excited: the ability to use not two, not one, but half a channel of memory when connected to the CX700 integrated north bridge/south bridge.

When the Pentium launched, it widened the processor bus to 64 bits. With memory manufacturers churning out 32-bit SIMMs, early models had to be equipped with two to make up the full width, so the DIMM was quickly introduced.

So why now make the move back to pre-1993 32-bit, especially when everybody else is focusing on more bandwidth? Well, it's got three reasons: PCB space, routing and component availability.

DDR chips come in various different flavours, split by speed, capacity and bus width. Most DIMMs use 8-bit chips, so you stick 8 of them onto a DIMM to get the 64 bits. If you're making a tiny device, there's little point picking a CPU that is fractionally smaller when you then need to put 8 big memory chips onto your board.

Wanting to save space forces you onto non-standard chips, which you can get 16 or 32-bit versions of, or less common packages such as mini BGA. These can be a problem to buy, as they're not used for DIMMs, so are not shipping in anywhere near as large volumes.

VIA-s move to 32 bits means you have a nice choice to make if you sacrifice a little performance. Use four normal chips, get the advantages but still save half the space, or make your entire system work from just one or two memory chips! Perfect for the smartphone designers.

Whichever you choose, a 32-bit interface is much easier to route than a 64-bit one.

Of course, the 32-bit transfers must also be supported by the processor, not just the north bridge, and support for this marks one of the differences between the otherwise almost identical VIA V4 bus and Intel's P4 one.

So while it might sound like performance suicide, the VIA core was never that bandwidth hungry, and it could be a genius move. You can make your entire mobile PC from three chips - tiny nanoBGA2 C7 (21x21mm), a CX700 chipset (35x35mm) and a 32-bit DRAM chip. That can be squeezed into a whole lot more places! µ