Nvidia defends its Nforce 3 150 chipset

LAST WEEK we referred to an article in Tom's Hardware Guide, where the author said some interesting things about Nforce 3, describing it as "buggy" and blaming Hypertransport for lack of performance in a review of the Nforce 3 150 chipset.

Now Nvidia has told us that the Nforce 3 marchitecture was designed to provide necessary bandwidth for all devices you use. Nvidia believes that increasing the speed of HT link us unnecessary, and claims that the performance of Nforce 3 150 in many tests proves that a single chip design teamed with Nvidia's marchitecture reduces system latency and increases efficiency of the chipset.

Nforce 3 150 was designed to have 16b downlink and 8b uplink running at 600MHz, 1.2 GHz DDR effectively with peak bandwidth at 3.6 GB/s. Via's implementation runs at 6.4GB/s, and as far as we know 800MHz. Supporting 16x16b at 800MHz doesn't give any performance gain, Nvidia claims.

What's the long and the short of this? Nvidia wants to send a message that its 3.6 GB/s is enough to fight Via's 6.4 GB/s.

The gist, Nvidia claims, is that its 3.6GB/s is enough to cover the bandwidth for all devices, as AGP can at max use 2100 MB/s, 25 MB/sec for 10/100 Ethernet, 2x ATA 133 total 267 MB/sec, for 6X USB 2.0 360 MB/sec, and 133 MB/sec for PCI. The maximum load, it claims, will never happen.

The next generation Nforce 3 250 Gb will be designed to use a 16b uplink and 16b downlink running at 800MHz effectively 1.6GHz DDR, necessary to provide more bandwidth for Gigabit Ethernet and its 256 MB in full duplex mode and four S-ATA drivers that need 600 MB/s.

Why does the Nforce 3 sometimes ends up slower than the Via K8T800, then? Nvidia alleges that some review sites were using Via/MSI overclocked boards to test versus non overclocked Nforce 3 boards.

It will be interesting to hear Via's side and we wouldn't mind testing both to iron out these wrinkles. µ