How AMD will seek to limit Intel's Core chip success

IN APRIL LAST YEAR, Celoxia and DRC Corporation announced a workstation that couples an AMD Opteron processor with a dynamically-reconfigurable co-processor module manufactured by DRC and populated with the Virtex-4 FPGA chip from Xilinx. The co-processor plugs into an Opteron socket.

"We believe we will get 10 to 20x application acceleration at 40 per cent of the power," DRC's CEO Larry Laurich was reported to have said. "At the same time, we're looking at a 2 to 3x price performance advantage."

But in a HPC Wire story from just last month, DRC's COO Michael D'Amour authored a piece entitled: Standards-based Reconfigurable Computing for HPC. He said that application acceleration is in the 10 to 100x range. He also went on to say that some programs, such as gene sequencing and facial recognition, can be accelerated by over one thousand times. Taken altogether that isn't acceleration, that's a quantum leap.

In May last year, Intel disclosed, "record-breaking results on 20 key dual-processor (DP) server and workstation benchmarks. The first processor due to launch based on the new Intel Core microarchitecture - the Dual-Core Intel Xeon processor 5100 series, previously codenamed “Woodcrest” - delivers up to 125 per cent performance improvement over previous generation dual-core Intel Xeon processors and up to 60 per cent performance improvement over competing x86-based architectures [read Opteron], whilst also delivering performance per watt leadership.”

Up to sixty per cent improvement over competing x86 based architectures doesn't sound a lot when DRC is claiming orders of magnitude acceleration at a lot less power. Now, some will say that these performance improvements will mainly be seen in the HPC space, which is true. But is that fair? I believe that this package-level, integrated technology over time (multi chip module - MCM), and HTX based versions - not necessarily from the companies mentioned - will trickle down into the general server and workstation markets, so I feel the comparison is just.

“HPC from Niche to Expanded Market Opportunity”
In December last year, a HyperTransport Consortium (HTC) HTX interconnect technology webcast, where IBM and QLogic presented, revealed some interesting information.

Mario Cavalli, HTC's general manager, said in his introduction that, “high performance computing has been one of the fastest growing industry sectors.”

The slide that accompanied that quotation was headed: "HPC from Niche to Expanded Market Opportunity" - and showed, from left to right, three pyramids dated 2004, 2006 and 2008.

Each pyramid was divided top to botton into four parts. Beginning at the top, the first sector was entitled Scientific, followed by Enterprise, then PC Gaming, and lastly Consumer.

The 2004 pyramid showed HPC only in the Scientific space. The 2006 pyramid showed HPC in the Scientific and Enterprise sectors. The 2008 pyramid showed HPC in the two previously-mentioned sectors as well as PC Gaming.

If that trend continues, by 2010 HPC will occupy the Consumer space as well.

AMD stream computing
AMD launched its “Close to Metal” technology (CTM) last November, which is a thin hardware interface that the company claims accelerates application performance by up to eight times faster than traditional 3D API's.

CTM makes use of the company's stream processing chips - formerly ATI graphics processor units (GPUs) - which allow developers access to the native instruction set and memory of AMD stream devices.

Even though AMD claimed, in its press release, an eight-fold performance increase over traditional 3D APIs, the company affirmed on a web page, which gave a good explanation about its stream computing efforts, a respective 16x and 20x performance improvement for two different PeakStream simulations, risk assessment simulation and seismic data modeling.

In February this year, the company demonstrated a “teraflop-in-a-box” computer, which used two next-generation AMD R600 stream devices. The chip maker claimed a ten-fold performance increase over today's high performance server platforms.

Stream computing has consumer applications as well. One area where this technology is already being used is in PC video games. But a far bigger market is emerging: Vista based PCs. As AMD CTO Phil Hester said during his December 2006 analyst day presentation, “Soon, achieving the optimum [Vista] experience will require a robust level of 3D”.

Why could that prove advantageous to AMD? We reported earlier that Intel leaned on Microsoft to get its IGP chips “Vista approved”. We said then that some at Microsoft had said that this was the worst compromise that the software maker made. So the true Vista experience won't be anything to write home about when using PCs based on those chips.

AMD may qualify its stream chips for HTX slot use, as the company may have to do that as an engineering exercise prior to package level integration (multi chip module - MCM). Another reason why those chips could be launched is that they currently interface on the PCI-E bus, which means they could be used on Intel x86 platforms. If HTX stream chips delivered the goods, PCI-E support for non-graphics markets could be dropped.

Fusing it all together with Fusion
AMD's Fusion program will bring its CPU and GPU together at the silicon level - all on one piece of silicon. The company has said that its Fusion chips will see use in “laptops, desktops, workstations and servers, as well as in consumer electronics and solutions tailored for the unique needs of emerging markets.”

The chip maker has claimed that its Fusion chips will: “Deliver step-function improvements in microprocessor performance-per-watt-per-dollar over today's CPU-only architectures”.

For the workstation and server markets, package level integrated versions (MCM) may be brought to market first, as the late 2008 or early 2009 arrival of the first Fusion device, which the company has said will launch in laptops first, is too far off.

Since AMD has used a bunch of names to describe its co-processor and accelerator-enabling technologies, Torrenza will be used as the umbrella term that covers them all. So when Torrenza is mentioned in the last part of this piece, keep in mind that this includes AMD stream, CTM, and Fusion.

In part three tomorrow, a virtualised, low-latency platform could give AMD an important technological advantage. µ

See Also
Vista's worst compromise is its support for Intel integrated graphics

L'INQs
Standards-based Reconfigurable Computing for HPC
HyperTransport HTX interconnect webcast
AMD stream computing