Rambus spills the beans

RAMBUS ANSWERED ONE of my biggest questions about XDR at the Intel Dev Forum. The question is this, if a single XDR chip is quoted at 10 or 12Gbps, and is point to point, how can XDimms, the XDR version of a DIMM, have the same bandwidth? More importantly, how can you have 8 devices on a point to point interconnect?

The answer is quite simple of course. The chips have a programmable width, so if you want, you can cut it down from it's native 16 bits to a lesser number. If you want four chips on an XDimm, you cut the width down to four bits. If you want eight, you go to two, two goes to eight. The per pin bandwidth stays the same, so the overall bandwidth does not change either. Get that?

The operation in a DIMM is roughly the same, you run 16 signals to the chip, and route them how you want. Each connection is point to point, but the number coming in is still the same, so it works just the same. This is a tremendous advantage when it comes to designing boards, you just need to run a set number of traces, and the memory can do the rest. If you make a video card with 128 or 256MB of RAM, 99% of it stays unchanged between the variants, because of the programmable widths.

Ramboose had several working XDimms at IDF, and here is a picture of two in action. They use the same physical layout as RDRam RIMMS, so not shockingly, they look a lot like a RIMM.

One other interesting thing the lads and lasses had at the Rambus booth was an S3 GammaChrome S18 graphics card. This card uses Rambus technologies to implement the PCIe bus. While you can't really see the Rambus tech, the card looks nice, and pics of graphics cards always seem to draw geeks in, so here you are. µ