AMD Barcelona: HT3 Turn Off?

IF YOU REMEMBER the early Barcelona talk of a year ago, we all expected the new, world's first native X86 quad core CPU to bring along the first HyperTransport 3 implementation - and at no less than four links, compared to three in the current high-end Opterons.

Why is this important? Well, HT3 brings not only twice the speed and a few extra features over the current HT2, but, combined with the extra link, it would dramatically improve the scaling at the upper end - 4 socket and especially 8 socket machines. After all, current 4S Opterons with three links per CPU, and some occupied by I/O bridges, don't allow for true all-to-all connection between the CPU: from CPU 0 to say CPU 3, you got to go through either CPU 1 or CPU 2.

In the case of 8-socket Opterons, the only branded boxen still being the Sun Galaxy series, it may sometimes take up to two extra HT hops to reach the end CPU - easily a 200 ns penalty for every access, on top of usual memory access time.

If, instead of three HT2 channels of 8 GB/s per channel, each CPU had four HT3 channels of 16 GB/s each, not only would you have a perfect-scaling 4-socket monsters with all-to-all communication without intermediate hops, even the 8-socket system would be done with a maximum one extra hop between any two CPUs, and with those hops nearly twice as fast.

Now, get ready for the prime one - Barcelona dies actually have all that four-link HT3 stuff on already. However, certain OEMs - let's say a few major brands except Sun - supposedly demanded just pin compatibility with the current stuff, to avoid designing new systems from scratch. That required turning off the fourth link, and making the other three stay as half-speed, HT2 channels.

Sun was the only one who wanted the new four-channel pinout and HT3 support - no wonder, as they were the only ones having guts to bring out 8S Opteron in the first place. HP, IBM and Dell might have been not too interested to bother abou t that - after all, they could be busy designing the new 2S, 4S and 8S Nehalems...

One party which I don't understand here is AMD - if the four channel HT3 Barcelona was out, especially the forthcoming stepping with DDR2-800 controller, Intel's quad socket Tigerton/Caneland would have zero chance scaling against that beast. And yes, 8S well scalable Barcelonas could be done by many, a year ahead of Gainestown.

AMD decided to listen to HP, Dell at all, all of whom still have a dominant Intel business portion, while not listening to Sun, who for quite a time literally bet its life on Opterons - and let Barcelona, and its successor Shanghai too - sit crippled with the only version being the one for the old socket. Do they wonder why Sun now also gradually, but steadily, increases its Intel presence?

I actually asked one of the AMD execs face to face why Barcelona, a scalable server CPU, is denied HT3, while Phenom, a desktop part where HT matters the least, has HT3 from the very start. One of the answers was amusing: Phenom needs to handle smooth HD video processing among others, so a jump from HT2 to HT3 was necessary. While, on the other side, compatibility was a must for the servers.

Now, let's have a look at an uncompressed HD 1080p60 stream in 30-bit (10 bit component colours) resolution, about the best you can get in HD for some time. Roughly 6 MB per frame, times 60 frames per second, plus some overhead - we're talking about 400 MB/s net. HT2 at 1 GHz give you 8 GB/s, or 20 times that - shurely enough margin for that HD stream to fit in?

Anyway, the much spoken of Bulldozer core, aimed for some time in 2009, according to AMD's slides, should have those four HT3 channels fully enabled. If I was AMD, I wouldn't wait for that far-off CPU whose supposed timeline lies beyond the urgent deadlines for AMD company recovery... I'd do that Turn On and make the high end 4-link HT3 enabled Barcelona/Shanghai socket, if for nothing else, than to truly spoil Intel's Caneland party and keep the high-margin 4S-8S market to itself for a while longer - if they wait till Gainestown, it could be too late. µ