
I am the mother of your children. Whither can I fly, since all Greece hates the barbarian? - Euripides, Microsoft Medea Center
The other bit of news from OCZ is a bit older, it announced Zero-Buffer DDR memory last October. The actual functionality was a bit puzzling to me, and the press release was a little light on technical details. The 'what' part was obvious, it clocks higher, the 'how' side was a little less clear.
Thanks to Michael Schuette, it all became clear in a hotel room overlooking Las Vegas. First, the module ignores seven of the eight clock signals sent to it, there can be some variability between them. It then takes the last of the eight and forwards it to where the other seven should have gone.
Coupled with a more controllable board layout, the buffer to the RAM is the only variable, you can keep a much tighter reign on clock abnormalities. If you can forward the clock signal fast enough, you should see no difference between the ZB-DDR and and normal DDR, no single clock delay ala normal Registered ECC memory.
Then end result is a highly overclockable stick of DDR with a small price premium. While I have not tested it myself, it sure sounds interesting, and the demo I saw was at the very least, functioning well enough to play music for an entire party at CES without a BSOD. µ