E7500 Plumas

The original article is here.

Nearly all of those who replied asked their names and companies be withheld.

Letter One
"He said it's not just Intel chipsets that have what he described as "abysmal" PCI bus performance. Nvidia and Via chipsets also need fixing so they provide better PCI performance for Gigabit Ethernet and video cards, he noted."

... the difference being that with VIA's chipsets, the behaviour is programmable, and the poor throughput observed on some boards isn't a chipset internal stall like with the i850/860, but actually just a choice in register setup. The jury's still out on the NVidia chipset, there seem to be some boards that don't show that symptom - be it because they have later revisions of the chip or a revised register setup.

VIA's PCI arbiter can be tuned for single device throughput vs. multiple device fairness, and many many BIOSes have been leaning way too far onto the fairness side, interrupting long data transfers from/to a single device far too often.

Not that it would have mattered much until recently ... only now that even average I/O cards make the PCI bus hit the ceiling it starts to show symptoms. The benchmarking public would like to see throughput (fairness hardly being measurable), so VIA's "performance patch" and later BIOSes set the chipset up to do that. However, there is no "best" setup - it's rather a question of which symptom you want - with the PCI bandwidth being saturated, you either get best throughput at the expense of throwing other, very timing dependant things like realtime streams or LAN transfers off the rail, or the other way round. Try to use a TV card and an IDE RAID at the same time, on a system that lets you choose the balance, and you'll see what I mean.

Besides, GBit Ethernet on 32-bit/33 MHz standard PCI is rather pointless anyway. You need around 250 MB/s for that to work well (it's full duplex!).

Letter Two
I was quite surprised to read your article entitled "Intel's E7500 Plumas hit bandwidth bottleneck". In my experience, the E7500 Plumas is not the dog that the i8x0 chipsets were. Using 64-bit/66MHz PCI, our users see quite good I/O bandwidth.

The VIA and NVIDIA comments were right on the mark. Most consumer chipsets do not do very well at I/O intensive tasks.

Please don't publish my name, email address or company

Letter Three
I was suggesting that PCI Express could hang off the MCH, and that would be a good reason to use the standard. The power needed to drive a serial technology is much lower than the current PCI bus. The pin count is also much lower. These are two problems eliminated if one wanted to integrate PCI Express in the MCH/Northbridge. SiS has managed to create single chip MCH/ICH's, but nobody else is joining that bandwagon.

The i860 supported two 64/66MHz PCI busses and one 32/33 bus off the southbridge. Each 64 bit bus was off a bridge chip. The bandwidth max is (rounding down) 500+500+100 MB/sec.

The i850 only had the 32/33 bus off the southbridge (ICH), a theoretical max of 125 MB/sec (some insist 133, but that doesn't account for overhead cycles).

Letter Four
Are you sure your integrator knows what he is talking about? It sounds like he is using standard PCI cards. In that case BROADCOM/serverworks will also give you about 90MBs as well. You need to use 64 bit PCI or PCI X Gigabit Ethernet adapters to get to 1GB(or scsi cards with same support).

And as far as I know, the IO bandwidth on PCI X is limited to 1GB per slot on the E7500. In a regular 32 bit PCI slot its only 133MB max. You need to CLARIFY big time what you mean by all this as it is very much innuendo not fact. It is not necessarily a chipset issue. You need to get a lot more documentation before flinging mud like this.

I know that you love hearsay and speculation but this looks dead wrong. You are losing credibility with me big time by being so anti-intel. And I never seem to see anti-AMD stuff anymore just hammer advertisements errrr articles on your site. Think about balance and fairness