Intel confirms 6MB of Madison cache

INTEL HAS CONFIRMED the stories we've been running at the bottom of this page since the 9th of April and which we first reported early last October, and said it will release its "Madison" IA-64 processor next year with 6MB of cache.

That news came as Paul Otellini, soon to be CEO of Intel, once again demoed the Banias mobile processor, which will be out in the first quarter of next year, and also said that there would be Pentium 4 processors running at 3GHz at the end of the year.

Intel has said this for a little while but all its desktop roadmaps this year show it topping out at 2.8GHz. The next set of roadmaps may demonstrate some change in those plans.

Madison, said Otellini, will include 500 million transistors and be built on .13 micron technology.

It is the follow up to the Itanic 2, so logically could be presumed to be the Itanic 3. It already has silicon for Madison, said Otellini in the conference call.

Our only puzzle now is why Intel roadmaps show Deerfield shipping at the same time as Madison, when it is supposed to be the Itanic 4.

This could suggest some subtle sea change in Intel's plans, we'd say. µ

See Also
Intel Madison: 6MB of L3 cache 8 October 2001
Madison, Deerfield to launch this time next year
More spookily correct Intel predictions