AMD Hammer: one hot chip?

A WHILE BACK, AMD gave a ballpark figure as to the power requirements of the Hammer. The figure seems fairly respectable, a 100 million transistor chip operating at a moderate 70 watts. Whether this low power figure is due to a comparatively low clock speed or the silicon on insulator (SOI) process is difficult to tell. Suffice to say that, for a chip that is supposed to be PR 3400+, that's a very low power requirement.

The story of power gets deeper, though. Start counting those transistors. A Sledgehammer (Opteron) with 1MB of cache will have 100 million of the little blighters. Now start thinking about the Clawhammer (Athlon 64). The base model only has a 256K cache. That knocks down the transistor count by more than a third. Realistically, we're talking a 60-65 million transistor chip.

It doesn't take too much of a leap to start thinking that the power requirements for a chip that is 30-35 per cent smaller is also going to be somewhat lower. It's doubtful that it will be as much as 30 per cent lower but the difference will definitely be significant.

So, that gives Athlon 64 a definite advantage in the corporate market. It's not going to make too much difference to the average single processor system but multiprocessor systems should benefit enormously. A dual processor Athlon 64 system might well chew less power than a single high-end P4. It could well be the perfect chip for server racks.

The other benefit of the lower power requirement is that it gives AMD much more room for scaling the processor to higher clock speeds. While we're on record, as being less than convinced about the Athlon 64's built in memory controller, the chip's head room may give it enough of a boost to overcome that problem in the long run.

Once again, time will tell. µ

Arron Rouse is a freelance Technical Author and Business Analyst.

See also:
Hammering away at AMD's future chips
SAP follows Oracle, IBM with AMD X86-64 support for R/3
Hammer the Memory
HammerTime!