How AMD bakes its 65 nano Barcelona cakes

WHEN WE PUBLISHED pictures of the Rev H/Barcelona wafers, its debut was part of a long discussion on AMD manufacturing.

Oddly, it followed a talk on Intel manufacturing, and it highlighted the differences between the two in great detail. The two companies couldn't be more different.

Intel has a strategy of copy exact. Basically, whatever the technology is, it is rolled out to the relevant fabs exactly the same way. AMD has a more "on the fly" approach and experiments in real time on the production lines.

Part of the reason this philosophy came about was until recently AMD really only had one fab, Fab 30, and even now only has one capable of 65 nanometre production, Fab 36. Intel, in comparison, has several development fabs, and many other cutting edge plants. Neither company can afford to build fabs on a whim, they cost a few billion dollars each, but Intel has many, AMD has one or 1.5 if you count the IBM R&D centre. AMD has no luxuries, it has to produce stuff with what it has.

With one eight inch fab, AMD managed to supply the industry with about 20% of the demand for x86 CPUs, which is quite a feat. On top of that, it improved the process in line, and developed the tools to do so. The key driver to all of this is called APM, or Automated Precision Manufacturing, a software infrastructure to read data, show the operators, and then feed it back into the system. This allowed AMD to run quite lean and make only the chips needed and continuously tweak them. When your back is to the wall, and any mistake means death, you can do amazing things. AMD, as you may have noticed, did not die.

Chocolate Chips, Twinkies
APM keeps track of equipment, the wafers going through, and what comes out. It can set processes, change parameters, and read back the results. If you put a cake in the oven and bake at 450 for an hour, and it comes out a little dry, you will probably put it in for 55 minutes next time. If you are a hostess making Twinkies, and you decide to try baking them for 55 minutes, you may end up with a warehouse full of mushy twinkies. That is bad, but you will survive, and probably only lose a day of production.

Chips take three months in their journey through a fab, and if each one has 250 sites worth $100 each, a wafer can be worth $25,000 or more. 5,000 starts a week, 10 weeks before you can test them, and that means in process $1,250,000,000. If you turn a knob and end up with the chip equivalent of mushy Twinkies, it is a multi-million or billion dollar 'oopsie'. APM in part refines things so that you can run a test on 20 per cent of a lot, or five wafers. That is still in the tens of thousands of dollars for a test, but you can run a lot of tests for far less than one mistake without it.

Basically, AMD can automate the testing and incorporate the feedback on the fly. When you decide to do 10 per cent more on step 37 of 91, three weeks into a 12 week process, getting accurate and timely feedback is essential. What APM does is allow AMD to pick a set of wafers and apply the special sauce, and track them at every point from then on while cataloging all the metrology details. If it works, and has good yields, it can be made part of the permanent mix very quickly.

Copy Exact, Copy Inexact
This continuous small scale improvement program allows AMD to keep things moving and improving. AMD claims it aims to get the process down from five wafers to one, allowing for more and cheaper tests. Contrast this to Intel's seemingly much more rigid approach of copy exact. There are upsides and downsides to both, but AMD's approach is more fun to watch from the outside.

One other nice touch is the move from one process to another. AMD uses two programmes - one is Continuous Transistor Improvement(CTI), the other Shared Transistor Technology(STT). CTI means that a process is not a monolithic thing. The 90 nanometre process probably has several distinct and different transistors across it, but people only pay attention to the geometry.

There have been several reviews that claim a Week Five chip is vastly inferior to the Week 45 part in power and overclockability, but both are marked A64 4800+. This is CTI at work. STT ties into this through the continuous improvement of the transistors. When AMD is about ready to make the 90 nanometre to 65 nanometre move, it will have thrashed the 90 nanometre tools really hard, and used as many techniques from the early 65 nanometre transistors as possible.

Once the equipment is changed over, the new transistors are more or less the same as the older ones, leading to a whimper not a bang in improvements. The cycle will then start over on the new process, with CTI making gains again. When you see a new speed grade, or a reported hot overclock, it is probably a new transistor hitting the streets. Together, CTI and STT make a pretty powerful combination, and with APM, it ties it all together in a hopefully seamless way.

APM also takes care of business planning. How many Semprons vs Opterons do you need? X2s vs Turions? If you guess wrong, you end up with a hugely expensive batch of chips in the warehouse, and they age as well as dead fish. You have to guess at product mixes at least three months out, so this is not an easy job. Enter the business side of APM and related tools.

What AMD has done is put in place a lean manufacturing strategy, make what you need, when you need it, and make only those parts. AMD claims it does not start a wafer without an order in hand, if you sell something before you make it, you almost never end up with depreciating parts in the warehouse.

This lean strategy, implemented at Fab 30, allowed it to increase productivity by 31% and start 1,000 more wafers a week.

In addition to more starts, it also lowered cycle time. If you can have more cycles a year, you make more with what you have. On top of that stock falls by about 40 per cent, so AMD has fewer components sitting around losing money.

Money Machinery
So this process continually cuts down the parts of the manufacturing process that does not directly contribute to AMD making money. The harder you can push these bounds the higher your margins, and that is what the game is about. On this front, we know the AMD approach, push things continuously, but the Intel side is a little more hazy. It is said to have a more monolithic structure that knows exactly what it is doing before it starts the first wafer. I would guess there are analogues to STT and CTI but the general principle is that if the indications are perfect then manufacture. If you never need to fix something, you start in a better place and stay there.

The tools themselves are important. For example, the tool at step 27 needs to tell the tool at step 28 that a pod is on the way and warm up the oven. The more they can work as one, the better the entire process.

On top of that you need to send data to external sources for supply, repair and a host of other needs. If the tool at step 19 runs out of resist it is supposed to spray, the entire fab grinds to a halt, and you don't want a $3 billion building sitting idle. The more a supplier can peer into the chain, the better things can run.

But all of this communication must be secure, and must show people only what they need. You don't want the supplier of floor cleaning fluids to have access to final yield numbers.

AMD has two processes in place here, a secure e-manufacturing framework and the heavy use of something called Interface A. The e-manufacturing framework allows partners to peek into the chain when and where they are supposed to, and act on that info.

Interface A is a more interesting bit of technology. It is an API that allows fab tools to communicate. If the data needs to be sent from tool 16 to 12 and 39, it can be done without AMD writing all the glue code for each and every interaction. They more or less all speak the same language, and the only thing left to write is the logic of what the tools tell each other, not how they do it.

AMD seems to have this down to a tee, too. It has the tools talking, the suppliers talking, and all the pieces humming along. The shock is that this all runs on Windows, including SAP, SiView, Camstar InSite, INCA on MS SQL and Catalysis APC. It is all tied together with ASP, Metaframe and Sharepoint. While it is Microsoft heavy, AMD also has large swaths of JBOSS running, so it looks like a case of the best tool for the job vs any philosophical bent.

What is the end result? On Thursday at the Microsoft Global High Tech Summit, a manufacturing conference, Thomas Sonderman spoke about AMD's manufacturing. At the very end, he pulled out a wafer of Barcelona Rev H quad core parts out of the dustbin of obsolete technology and waved it around. As you can see, he was smiling a lot, so I guess the process worked. He closed with "Leap Ahead to the smarter choice, AMD", which made the whole audience giggle. µ