Prescott, Itanium III to get airing at chip conference

And a number of other vendors look set to reveal some of their future technology too, with Fujitsu, Intel's new friends, speaking about a .13µ (micron) fifth generation 1.3GHz SPARC 64 chip, which dissipates 34.7 watts and is a four issue out of order design with 2MB of on chip L2 cache.

HP will also demonstrate the implementation of an "Alpha" 150 million tranny processor on a .13µ silicon on insulator design.

The 1.5GHz "third generation" Itanium processor, presented by Intel, will speed along at 1.5GHz and have an on die cache of 6MB, and be 374mm ² . Intel will say it has 410 million transistors and will be implemented on a .13µ (micron) package using six level Cu interconnects with FSG dielectric, dissipating 130 watts.

Cisco will show off details of a 600MHz NT3 network transistor using a .18µ process at 349mm ² , consuming 20 watts.

But Intel is being considerably coy about the 90 nanometer "Prescott" chip it wants to show off, we understand. µ