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x86 vendors move away from old strategies to compete with ARM

Frequency and core count take a back seat to efficiency
Mon Jan 14 2013, 09:00
ARM chip

ARM chip vendors might soon have to drop claims that the x86 and AMD64 instruction sets cannot scale down to the low power levels needed to run smartphones and tablets.

CES saw AMD and Intel push their respective x86 and AMD64 architectures further into the smartphone and tablet markets with dual and quad-core chips that they hope can take the fight to ARM vendors such as Qualcomm, Texas Instruments, Nvidia and Samsung. For a long time ARM vendors and ARM itself have chanted the mantra that ARM is inherently a low-power instruction set, especially compared to the cumbersome x86 and AMD64 instruction sets, which is theoretically true, but practically it might be becoming obsolete.

ARM's instruction set argument harks back to the RISC versus CISC debate that raged for decades. ARM's problem is that both AMD and Intel have mutated x86 chips into processor designs far beyond the old definition of CISC. In the case of Intel, it has coupled x86 chip layouts to manufacturing capabilities that are at least 18 months to two years ahead of its competitors.

Intel's decision to go into the smartphone market is largely made possible not by the x86 instruction set but rather by its ability to tweak its process node. AMD on the other hand has to rely on foundries such as Globalfoundries and TSMC, both of which have mature 30nm class process nodes and rapidly maturing 20nm class process nodes but nothing the firm can rely on for high volume CPUs.

Although Intel's Medfield Atom chip ended up in largely nondescript smartphones in 2012, the firm did surprise many with its performance in Motorola's Razr I handset.

Intel's chip, despite being a single-core unit, didn't show any significant performance issues but most importantly it didn't drain the Razr I smartphone's battery noticably faster than ARM-based processors in smartphones. Users were still faced with the same one-day charge cycle, meaning that unless the user saw the Intel Inside logo on the back of the device, they would be hard pressed to tell that it was running what had previously been described as a chip based on a power-hungry instruction set.

As for Intel's Atom chip ending up in mid-range, forgettable handsets, 2013 looks like the firm is finally starting to go for the high end. Lenovo's K900 smartphone not only looks the part but can showcase the performance of Intel's Atom chip.

While Intel is going deeper into the smartphone market, AMD has opted for the tablet market, one where power consumption requirements are slightly more lenient than smartphones. It should also be noted that most tablet brands such as Amazon, Asus, Acer, Google and HP do not sell tablets with 3G connectivity, so that's something AMD doesn't have to worry about integrating into its chips.

AMD's decision to stick with tablets is a shrewd move for a firm that is banking on its graphics technology to create demand for its processors. While smartphones are used for gaming, there's litle doubt that tablets can make better use of the graphics core found in the firm's accelerated processing units through higher resolution displays.

AMD's biggest challenge isn't at the silicon level but rather getting developers to make use of OpenCL in order to engage the GPU in Temash or any of its other APUs. AMD, like Intel, cannot simply continue to add CPU cores in the same way that both firms ramped up clock speeds in the 1990s and early 2000s to increase performance due to power and physical die size, which itself is a property of the process node and in the case of AMD is something that it no longer has any control over.

There's nothing wrong with AMD's decision to favour the tablet market. After all, Gartner predicts that the market for Windows 8/RT tablets will hit 43 million units by 2016. Although Microsoft's latest operating system will acccount for less than 10 percent of the total tablet market in 2016, according to Gartner, that will still be more than enough for AMD to not only stay in business but make a considerable amount of cash.

So while AMD and Intel are moving away from the core count race, Samsung, which arguably is the most important ARM chip vendor in the smartphone and tablet markets due to its popular Galaxy range of devices, announced an eight-core chip at CES. Samsung's Octa Exynos 5 core count is due to the ARM Cortex Big.little architecture that uses different cores to provide flexible performance, so those eight cores are actually two sets of slow and fast cores harnessed together.

Like AMD, Samsung therefore has a software problem on its hands, because having many cores is only useful if applications make use of them, and there are still questions about whether most smartphone users even need more than two cores, something Qualcomm told The INQUIRER last year. The point is that just because Samsung announced an eight-core chip, it doesn't automatically mean that devices making use of it will provide significantly better real-world user experiences.

Credit should be given to both AMD and Intel for bringing the power consumption of chips with x86 and AMD64 instruction sets to levels at which they can compete with those of ARM vendors. However while the two firms might be able to compete right now, ARM vendors do not have to rely on leading-edge process nodes to meet the same power requirements. After all, new process nodes costs billions to deploy and not even Intel can afford to spend close to $10bn every three years to design, test and retool fabs for new process nodes.

From an industry watcher's point of view, it is great to see the two traditional microchip CPU giants move away from their usual frequency and core-count race in order to compete with the relatively new ARM chip vendors. Right now, Intel is able to take the fight to ARM vendors and AMD's chips show promise in the tablet market, but the fun and games will really start next year when ARM vendors can start to take advantage of sub 20nm class process nodes from Globalfoundries and TSMC. µ


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